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研究生:張銘仁
研究生(外文):Chang, Ming-Jen
論文名稱:使用中央處理器與圖形處理器偕同運算於通道解碼器之技術
論文名稱(外文):CPU-GPU Cooperation for Channel Decoder
指導教授:游逸平
口試委員:賴煒棋徐勝均
口試日期:2017-10-18
學位類別:碩士
校院名稱:國立交通大學
系所名稱:資訊科學與工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2017
畢業學年度:106
語文別:中文
論文頁數:27
中文關鍵詞:通道解碼器維特比解碼器渦輪解碼器
外文關鍵詞:Channel DecoderCPU-GPU CooperationPthread
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  • 被引用被引用:0
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  • 收藏至我的研究室書目清單書目收藏:0
由於在我們的Soft-PHY eNodeB中,通道解碼器是由CPU執行,對於多使用者連線時執行時間會過久。在本篇論文中,我們將提出實作通道解碼器於GPU。
對渦輪解碼器而言,我們使CRC與MAP演算法達到歪斜平行執行,且加強子區塊之間的關係。我們提出了對於多使用者連線時,實作渦輪解碼器的方法,分別是獨立合作與虛擬單一使用者。最後,虛擬單一使用者可以在0.5毫秒內解碼120資源塊。
In our Soft-PHY eNodeB, channel decoder is implemented on CPU, the execution time of channel decoder is too long in multi-user condition. In this paper, we implement channel decoder on GPU.
We achieve CRC and MAP algorithm executing in skew parallel and enhance the relevance between sub-blocks in Turbo Decoder. We propose some methods to implement our Turbo Decoder in multi-user Soft-PHY eNodeB, including Individual Cooperation and Virtual Single User. Finally, Virtual Single User can decode 120 in 0.5 milliseconds.
摘 要 I
Abstract II
致謝 III
List of Contents IV
List of Figures VI
List of Tables VII
Chapter 1 Introduction 1
1.1 Viterbi Decoder 1
1.2 Turbo Decoder 2
1.3 Pthread 3
Chapter 2 Problem Statement 4
2.1 Viterbi Decoder in Sequential 4
2.2 Timing delay for LLR Tables Extracting and Inter/De-interleaving 4
2.3 Each UE do CRC Checking in Sequential in Multi-User Soft-PHY eNodeB 5
2.4 Few UE Numbers in Multi-User Soft-PHY eNodeB 5
Chapter 3 Non-Cooperative Design 6
3.1 Implement Viterbi Decoder on GPU 6
3.2 Implement LLR tables extracting on GPU 8
3.3 Implement Inter/De-interleaving on GPU 9
Chapter 4 Implementation of CPU-GPU Cooperation in Multi-User eNodeB 11
4.1 CRC checking of Turbo Decoder with Pthread 13
4.2 Individual Cooperation 15
Chapter 5 Experimental Result 18
5.1 Execution Time Calculating Script 19
5.2 Execution Time of LLR Table Extracting on GPU 19
5.3 Execution Time of Inter/De-intleaving on GPU 21
5.4 Execution Time of Turbo Decoder in Individual Cooperation 22
Chapter 6 Conclusion and Future Work 24
Reference 25
Appendix A Pthread APIs 26
Appendix B CUDA APIs 27
[1] Jyun-Ming, Hu. “Parallelization of Turbo Decoder on GPU”, National Chiao Tung University, 2017
[2] Wu, M., Sun, Y., Wang, G., Cavallaro, J. R. (2011), "Implementation of a high throughput 3GPP turbo decoder on GPU", Journal of Signal Processing Systems, 65(2), 171–183
[3] Mohamed H. Omar, Ahmed El-Mahmoudy, Karim G. Seddik, and Ayman Elezabi. "On the Tail-Biting Convolutional Code Decoder for the LTE and LTE-A Standards”, Signals, Systems and Computers, 2013 Asilomar Conference
[4] Ajit Nimbalker, Yufei Blankenship, Brian Classon, T. Keith Blankenship
"ARP and QPP Interleavers for LTE Turbo Coding", Wireless Communications and Networking Conference, 2008. WCNC 2008. IEEE
[5] Blaise Barney, Lawrence Livermore National Laboratory, "POSIX Threads Programming", https://computing.llnl.gov/tutorials/pthreads/
[6] NVIDIA, "NVIDIA CUDA Runtime API", http://docs.nvidia.com/cuda/cuda-runtime-api/index.html
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