臺灣博碩士論文加值系統

本篇論文提出了幾種具雜訊抑制的超寬頻與多頻段電路設計，其中包含了 (1) 超寬頻低雜訊放大器的分析與設計；(2) 降低相位雜訊技術的電流再利用壓控振盪器電路； (3) 使用諧振切換的三頻帶低雜訊放大器；(4) 利用主動式電感設計的三頻帶拒濾波器。
首先我們在超寬頻低雜訊放大器中，額外引入一阻值較大的基極電阻，以避免雜訊從電晶體的基極端交互流竄而惡化電路本身的雜訊指數特性。在不額外增加晶片面積、製程步驟、以及直流功率損耗的前提之下，採用此雜訊降低電阻於操作頻帶時，能達到30%的雜訊指數改善效果。當輸入回返損耗 (input return loss) 大於10 dB以上時，其頻帶內最大增益為14.5 dB，最小雜訊指數為1.6 dB，且總直流功率損耗僅為4.5 mW。
另外本論文提出一個具降低相位雜訊參數之電流再利用壓控振盪器電路，藉由改善傳統電流再利用壓控振盪器天生的差動振幅不匹配的問題，可以透過電路技巧，將差動輸出的兩端振幅精準匹配，並且透過新式架構的優點，同時將系統電源VDD降低，藉此同時達到低電壓操作、低功耗、高性能以及差動振幅匹配等優點。整體電路性能參數FOM (figure of merit) 為 -187 dBc/Hz，使用電壓為1.3V，直流電流為2.3 mA，直流功率消耗為2.99 mW，而在1 MHz offset時其相位雜訊約為-114 dBc/Hz。
多頻帶系統部分，本論文探討一個藉由切換的概念來實現三頻帶低雜訊放大器的操作，其能有效地減少系統面積來降低製作的成本，並且於第二個多頻帶低雜訊放大器設計中，利用回授式雜訊相消電路能同時達到輸入匹配以及改善雜訊指數的效果。在此設計電路同時導入基極電阻來抑制雜訊，採用此雜訊降低電阻於2.5 GHz操作頻帶時，能達到32%的雜訊指數改善效果。
在頻帶干擾的雜訊抑制部分，本論文採用主動式電感來完成一個三頻帶拒濾波器，其能大幅減少傳統螺旋式電感製作的面積成本，並具有高品質因子的優點。整體電路性能在2.4 /3.4 /4.9 GHz，分別具有23/ 24/ 31dB的雜訊抑制能力。

In this dissertation, the design methodologies and implementations of RF receiver circuits for multiband and ultra-wideband communication applications are proposed. There are four parts in this thesis, including: (1) the analysis and design of ultra wideband (UWB) low-noise amplifier (LNA), (2) the design of a current-reused voltage-controlled oscillator (CRVCO) with amplitude-balanced technique and phase-noise improvement, (3) the design of triple-band LNA using switched resonators and a noise cancelation technique, and (4) the design of triple band-notched filter with active inductor.
First of all, the design of UWB LNA implemented using 0.18-μm CMOS technology is presented. Increasing the resistance of the substrate resistor RB reduces the noise factor. When additional substrate resistors and a composite feedback topology are employed, the proposed LNA can achieve both a 1.4 dB reduction of the noise figure (NF) and a 4 dB enhancement in power gain (PG). A considerable noise power diminution in MOS devices with an additional larger substrate resistor is presented, 30% noise reduction of MOS devices can be achieved without extra chip area, CMOS process steps and dc power. Over the operating frequency range from 3.1 to 4.8 GHz, the LNA achieves a maximum PG of 14.5 dB, a minimum NF of 1.5 dB, and an input return loss of less than 10 dB. The measured current consumption is 3 mA with a 1.5 V supply voltage.
Secondly, a CRVCO with amplitude-balanced technique is designed for UWB applications and implemented in TSMC 0.18μm 1P6M CMOS technology. An extra cascode cross-coupled pair is adopted, which is used to improve the difference between the differential output amplitudes of CRVCO. After that, the coupling capacitor is employed to acquire a better phase noise. Finally, an extra cross-coupled pair is adopted to provide extra negative transconductance, therefore, the proposed CRVCO can also be operated under low voltage condition. The measured amplitude imbalance ratio is less than 0.15%. The measured phase noise is -114 dBc/Hz at 1MHz offset when oscillation frequency is at 7.8 GHz, resulting in an FOM of -187 dBc/Hz at a 1.3V supply voltage..
Thirdly, this thesis presents a triple-band LNA fabricated using a 0.18-μm CMOS process. The LNA uses a double-peak load network with a switched component to accomplish the triple-band operation. Moreover, noise reduction using a substrate resistor to ameliorate the noise performance is presented. Noise reduction of 1.5 dB can be achieved at 2.5 GHz without additional dc power and extra manufacturing costs. An input matching technique is realized simultaneously using a gyrator-based feedback topology. The triple-band LNA can be realized by using a dual-band input network with a switched matching mechanism. The target frequencies of the triple-band LNA are 2.3–2.7 GHz, 3.4–3.8 GHz, and 5.1–5.9 GHz, covering the operating frequency bands of time-division long-term revolution (TD-LTE), LTE-unlicensed (LTE-U) band, and WLAN technology. The measured power gains and noise figures at 2.5, 3.5, and 5.2 GHz are 12.3, 15.3, and 13.1 dB and 2.3, 2.2, and 2.6 dB, respectively.
Finally, an active triple band-notched filter with improved quality factor (Q-factor) in 0.18-μm CMOS technology are presented. Due to the FCC’s stringent power-emission limitation at the transmitter, the received signal power in the UWB system is smaller than those in IEEE 802.11 a/b/g wireless local area network (WLAN), the worldwide interoperability for microwave access (WiMAX), TD-LTE and LTE-unlicensed (LTE-U) band. To avoid the interferences such as the WLAN and WiMAX signals in the UWB passband simultaneously, the proposed band-notched filter can be adopted to eliminate these interferences. The 23/24/31 dB maximum rejections at 2.4/3.5/4.9 GHz while consuming a dc power of 13.5 mW at 1.8-V power supply.

ABSTRACT (Chinese) i
ABSTRACT (English) iii
ACHNOWLEDGEMENT vi
CONTENTS vii
TABLE CAPTIONS ix
FIGURE CAPTIONS x

CHAPTER 1 INTRODUCTION
1
1.1 Background 1
1.2 Motivation 2
1.3 Thesis Organization 4

CHAPTER 2 COMPACT COMPOSITE NOISE-REDUCTION LNA FOR UWB WPAN AND WBAN APPLICATIONS 6
2.1 Introduction 6
2.2 Noise-Reduction LNA 8
2.3 Noise Analysis 11
2.4 Circuit Analysis and Implement 14
2.5 Measurement 21
2.6 Summary 23

CHAPTER 3 A Low-Power Low-Voltage Current-Reused Voltage-Controlled Oscillator with Amplitude-Balanced Technique 24
3.1 Introduction 24
3.2 The Proposed CRVCO 27
3.2.1 The amplitude-balanced technique 28
3.2.2 Improvement on phase noise with coupling capacitor 28
3.3 The Measurement Results 31
3.4 Summary 34



CHAPTER 4 Switched Triple-Band Low-Noise Amplifier Using a Gyrator-Based Matching Network for TD-LTE/LTE-U and WLAN Applications 35
4.1 Introduction 35
4.2 Circuit Design and Analysis 37
4.2.1 Circuit Design and Analysis 38
4.2.2 Conventional Gyrator-based Active Inductor and Proposed Gyrator-based Triple-Band Input
Matching Network 41
4.2.3 Proposed Switched-resonator Triple-band Load Network 45
4.3 Proposed Switched Triple-band LNA 49
4.4 Measurement Results 50
4.5 Summary 53

CHAPTER 5 An Active Triple Band-Notched Filter with Improved Q-Factor for UWB System 55
5.1 Introduction 55
5.2 The Active Inductor with a Feedback Resistor for Q-Factor Improvement 57
5.3 The Outband Rejection Filter with a Parallel Capacitor for Q-Factor Improvement 61
5.4 The Topology of Proposed Active Triple Band-Notched Filter and the Measured Result 63
5.5 Summary 64

CHAPTER 6 Conclusions 67
REFERENCES 70
VITA 78
PUBLICATION LIST 79

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