本論文的主要目的是研究主動式功率因數修正，在轉換器方面，本文提出一新型用於功率因數修正之無橋交錯式降壓轉換器，並以數位平均電流控制法分別控制輸入交流電之正負半週來達到功率因數修正。交錯式架構不只控制較簡單，也能在高輸出功率下有效降低元件的電流應力，改善功率元件高耐流、儲能電感體積過大、輸出電容過大等問題。本文實際製作一480W之無橋交錯式降壓轉換器，以驗證論文中所提之分析與設計考量是否合理。
不同於大部分的功率因數修正轉換器皆使用在升壓架構，本文所提之無橋交錯式降壓轉換器，可適用在較低電壓場合，能降低輸出電解電容值，減少成本，且也因為交錯式降壓架構，可應用於較大輸出功率的應用場合。經本文實際測試結果驗證本來所提架構之可行性，且輸入電流總諧波失真與功率因數皆符合國際規範。

This thesis studies the active power factor correction. In terms of converters, this thesis proposes a novel bridgeless interleaved buck converter for power factor correction, and uses digitalized average current control method to control the AC input voltage in positive half-cycle and negative half-cycle to achieve power factor correction. The interleaved architecture not only controls simplicity, but also can effectively reduce the component current stress at high output power, improve the high current resistance of the power components, the overlarge volume of the inductors, and the overlarge of output capacitors. This thesis actually produces a 480W bridgeless interleaved buck converter to verify whether the analysis and design considerations are reasonable.
Unlike most power factor correction converters, which are used in the boost architecture, the bridgeless interleaved buck converter proposed in this thesis can be used in lower voltage applications, can reduce the values of output electrolytic capacitor and reduce the cost, and also because of the interleaved buck architecture, it can be applied to applications with high output power. The feasibility of the proposed architecture is verified by the experimental results in this thesis, and the total harmonic distortion and power factor of the input current can meet the international specifications.

目錄
論文審定書 i
誌謝 ii
摘要 iii
Abstract iv
目錄 v
圖目錄 vii
表目錄 x
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機 1
1.3 論文大綱 2
第二章 功率因數修正與相關電路架構介紹 3
2.1 功率因數規範、定義、修正技術介紹與諧波失真定義 3
2.1.1規範 3
2.1.2功率因數與諧波失真定義 4
2.1.3功率因數修正器技術 9
2.1.4功率因數修正器控制方法 10
2.2 降壓型功率因數修正器 13
2.2.1傳統降壓型功率因數修正器 14
2.2.2雙相交錯式降壓型功率因數修正器 16
2.2.3無橋降壓型功率因數修正器 17
第三章 無橋交錯式降壓轉換器之架構與分析 19
3.1 無橋交錯式降壓轉換器之電路架構與分析 19
3.1.1功率開關責任週期大於0.5之動作模式分析 22
3.1.2功率開關責任週期小於0.5之動作模式分析 27
3.2 降壓型功率因數修正器損失估算 33
第四章 電路設計與控制 38
4.1 電路元件與參數設計 38
4.2 周邊電路設計 41
4.2.1功率開關驅動電路 41
4.2.2取樣電路 42
4.3 控制晶片與程式設計流程 46
第五章 電路測試規格與實驗結果 49
5.1 無橋交錯式降壓轉換器實測 50
5.2 電路損失分析 60
第六章 結論及未來展望 64
6.1 結論 64
6.2 未來展望 64
參考文獻 65

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