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研究生:何麗安
研究生(外文):Elica A. Heredia
論文名稱:薄膜電晶體於低溫的量子現象
論文名稱(外文):Quantum phenomena of thin-film transistors at cryogenic temperatures
指導教授:江佩勳
指導教授(外文):Jiang, Pei-hsun
學位類別:碩士
校院名稱:國立臺灣師範大學
系所名稱:物理學系
學門:自然科學學門
學類:物理學類
論文種類:學術論文
論文出版年:2017
畢業學年度:106
語文別:英文
論文頁數:44
中文關鍵詞:weak localizationdouble gate a-IGZO
外文關鍵詞:weak localizationdouble gate a-IGZO
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This experiment focuses on the competition of weak localization (WL) and weak antilocalization (WAL) on a single gate and dual gate a-IGZO, these quantum interference effects on systems have been studied on a dual gate a-IGZO by varying the gate voltages (top gate and bottom gate), on the other hand, temperature and gate voltage were varied on a single gate a-IGZO to observe the competition between WL and WAL. The universal dependence of conductivity was partially unveiled on single gate a-IGZO and the full profile of this intriguing universal dependence was shown on the dual gate a-IGZO. It is speculated that the prefactor for WL (α0) and prefactor for WAL (α1) are determined by the ratio of the gap opening at the Dirac point to the fermi energy level, which can be manipulated via electric gating. This work hopes to help build a theoretical model and attract theoretical contributions that should be a great advantage in future applications in nanoelectronics and spintronics.
Chapter 1 Introduction.....7
1.1 Thin Film Transistor (TFT)......7
1.1.1 a-IGZO single gate TFT........8
1.1.2 a-IGZO dual gate TFT.........9
1.2 Weak localization (WL) and Weak antilocalization (WAL)........10

Chapter 2 Parameters and equations.........13

Chapter 3 Experimental methods and Instruments........14
3.1 Photolithography.......14
3.2 Thermal evaporator........17
3.3 Wire Bonding.........18
3.4 Refrigerator.........21
3.5 Source meter.........22

Chapter 4 Sample Structure........23
4.1 a-IGZO single gate TFT........23
4.2 a-IGZO dual TFT.........24

Chapter 5 Results and Discussion........25
5.1 a-IGZO single gate TFT.........25
5.1.1 Electrical characteristics of a-IGZO single gate TFT.......25
5.1.2 Competition between WL and WAL of a-IGZO single gate TFT.........26
5.1.2.1 Temperature controlled.........26
5.1.2.2 Voltage controlled.........27
5.2 a-IGZO dual gate TFT.........32
5.2.1 Electrical characteristics of a-IGZO dual gate TFT.........32
5.2.2 Competition between WL and WAL of a-IGZO dual gate TFT........34
5.3 Low-temperature polycrystalline silicon (LTPS).........38

Chapter 6 Conclusion........41

Chapter 7 References........42
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