臺灣博碩士論文加值系統

本論文主要是研究氧化亞銅摻銻及電鍍液酸鹼值改變對於電阻式記憶體電學特性之比較。銻摻雜能夠改變氧化亞銅的晶體結構，我們發現越垂直的晶體結構不僅可以減少電阻式隨機存取記憶體的操作電壓還能節省功率上的消耗，甚至能夠提升其高阻態與低組態之間的比值。除此之外，銻的摻雜還能夠使電阻式記憶體省略電阻式記憶體操作一開始所需的Forming操作(Forming-free)。
在氧化亞銅電鍍液pH值為11時，研究四種氧化亞銅電阻式記憶體:未摻雜的、摻雜硫酸銻的濃度分別為2mM、3mM、4mM在電解液之中。當摻銻模式為用3mM的硫酸銻時，氧化亞銅電阻式記憶體不僅展現出所有參數中最低的操作電壓(約1~2伏特)，還展現出最好的記憶保存性及耐久性。其高低阻態的比值擁有四個數量級。當摻銻模式為2mM及0mM的硫酸銻時，分別有2-4V及2-7.5V的SET電壓。摻銻的氧化亞銅擁有Forming-free的特性，而未摻銻的氧化亞銅在pH值為11時有10.3V的Forming電壓;而未摻銻的氧化亞銅在pH值為9.4時則有5V的Forming電壓。造成此差異的原因在於薄膜結構會隨著氧化亞銅(111)及(200)晶向強度不同而有所改變。雖然這推論仍在審查當中，但我們目前的研究結果認為氧化亞銅(200)晶向強度強時，在元件通入偏壓的過程能較容易形成導通路徑。
當元件的順向偏壓未達SET或Forming的操作電壓時，其導通機制為歐姆傳導。當順向偏壓逐漸累曾到Forming電壓或SET電壓時，導通機制轉為空間電荷限制電流(SCLC)模式，元件將會由高阻態(HRS)瞬間轉為低阻態(LRS)。此時，一個導電性較好的路徑將會形成。當順向偏壓的值逐漸降低後，其導通機制將會慢慢切換回歐姆傳導。
電阻式記憶體具有許多優勢，例如:高運作速度、高密集度以及非揮發性。此項研究能夠另外幫助氧化亞銅電阻式記憶體減少成本以及達到低功耗的需求。

This thesis studies the effects of antimony doping and electroplating pH value on the characteristics of a cuprous oxide resistive random access memory (RRAM).
Antimony doping can modulate the Cu2O grains structure, we found that a more vertical aligned grain structure is more likely to reduce RRAM operating voltages and save the power consumption. It can also increase the ratio of the value of high resistance state (HRS) to the low resistance state (LRS). In addition, Sb-doped Cu2O can be a forming-free RRAM.
When plating Cu2O film with pH=11 solution, four Cu2O RRAMs, un-doped Cu2O and Sb-doped with 2, 3, or 4mM
Sb2(SO4)3 in plating solution, were studied. When the antimony doping using Sb2(SO4)3 3mM, the Cu2O RRAM not only exhibits the lowest SET voltage (about 1~2V) but also has the best retention and best endurance. The ratio of HRS to LRS is about four orders of magnitude. Sb doping at 2mM and un-doped Cu2O RRAM have high SET voltages of 2-4 and 2-7.5V, respectively. In contrast to forming-free for Sb-doped Cu2O RRAM, the forming voltages of the un-doped Cu2O RRAM are 5V and 14V with pH=9.4、pH=11,respectively. Their difference is the film structure having Cu2O (200) or Cu2O (111)-preferred grains. Although it is still under investigation, we currently think this may related to the Cu2O (200) structure is easier to create conductive path when voltage applied. “hopping conduction” is likely the conduction mechanism of RRAM. The electrons can be transported via the defects of the insulator layer. High defect density creates more sites and more chance for the electrons to hop. It changes its state from the high resistance state (HRS) to the low resistance state (LRS), and a more conductive “path” will form at this time. When the amount of the voltage slowly decreases, the conduction mechanism will return to ohmic conduction.
The (200)-preferred Cu2O film possesses a highly vertical structure, and it is likely to create shorter conductive path of the RRAM. Lower pH value of the plating solution or doping Antimony can promote Cu2O (200) growth. Sb-doping makes the Cu2O grains smaller. The Sb doping creates easier paths for electrons to hop. More hopping sites or shorter hopping distance or lower hopping energy barrier are likely when dope Sb into the film. Vertical aligned grain structure and Sb doping can improve Cu2O RRAM performance, including: 1. Reduce the operating voltages 2. Increase the HRS/LRS ratio 3. Improve RRAM stability.
RRAM has many advantages such as: high speed, high density, and non-volatile. This study may help on Cu2O RRAM with a lower cost per bit and meet low power consumption requirement.
Keywords: cuprous oxide;resistive random access memory;Sb
Doping;pH value

中文摘要 I
英文摘要 II
致謝 VII
目錄 VIII
1第一章緒論 11
1-1記憶體簡介 11
1-2電阻式記憶體 12
1-3 電阻式記憶體在AI人工智慧上的角色 14
1-4 材料特性 16
1-4-1氧化亞銅(Cuprous Oxides)之特性 16
1-4-2鉑金屬(Pt)之特性 17
1-4-3銦錫氧化物(ITO)之特性 17
1-5 研究動機 17
2第二章基礎理論 19
2-1元件基礎理論 19
2-2傳導機制(Conduction mechanisms) 20
2-2-1穿隧(Tunneling) 20
2-2-2跳躍傳導(Hopping conduction) 23
2-2-3法蘭克普爾發射(Frenkel-Poole emission) 24
2-2-4蕭基發射(Schottky emission) 26
2-2-5歐姆傳導(Ohmic conduction) 27
2-2-6空間店和限制電流(Space Charge Limited current) 28
2-3氧化亞銅電組式記憶體的導通模式 29


3第三章實驗方法 30
3-1流程圖 30
3-2前導溶液調配 31
3-2-1無摻雜氧化亞銅(u-Cu2O) 31
3-2-2摻銻氧化亞銅(Cu2O:Sb) 31
3-3 ITO基板清洗 32
3-4電化學沉積法(Electrical chemical deposition) 34
3-5黃光微影製程(Lithography) 35
3-6濺鍍(Sputter)上電極 37
3-7去光阻(Lift off) 38
3-8 實驗設備介紹 39
4第四章結果與討論 49
4-1氧化亞銅電阻式記憶體 49
4-2材料分析 50
4-2-1以氧化亞銅摻雜銻的濃度為變因分析 52
4-2-2以氧化亞銅酸鹼值為變因分析 54
4-2-3氧化亞銅薄膜SEM材料分析 55
4-2-4氧化亞銅能量色散X射線與化學電子光譜儀分析 57
4-3電阻式記憶體電性分析 60
4-3-1電阻式記憶體元件結構圖 61
4-3-2 I-V特性圖 63
4-3-3耐操度(Endurance) 68
4-3-4 記憶保存力(Retention) 71
4-3-5操作電壓累積概率分佈圖 75
4-4機制探討 78
5第五章結論及未來研究方向 80
5-1結論 80
5-2未來研究方向 84
5-3重要文獻參考 86
參考文獻 89

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