臺灣博碩士論文加值系統

近年來，物聯網的發展應用層面越來越廣，伴隨著無線通訊系統與個人穿戴裝置越來越盛行，對於低功率消耗、低成本以及小面積的裝置有著不可或缺的需求。而本論文將低功率消耗的需求作為主要目標。
本論文提出一個操作在ISM頻段(Industrial Scientific Medical Band)，可接收並解調偏移四相移鍵控(O-QPSK)訊號之低功耗接收機。為了實現低功耗，於射頻前端電路設計中，去除高功耗的低雜訊放大器，並將正交振盪器的兩個電感由印刷電路板上的兩個環形天線取代，由於製作在印刷電路板上的天線可以實現較高的品質因數，如此一來，即可大幅地降低功耗。而解調方式是透過注入鎖定技術，將訊號注入至正交振盪器(QVCO)，不僅將相位變化轉換為振幅變化，同時，利用正交振盪器之輸出訊號為正交關係，使偏移四相移鍵控調變訊號在正交震盪器的輸出上有不同相位對應著不同的振幅變化，藉由上述方式，即可使用包絡檢測器將射頻訊號直接降成基頻訊號，並取代傳統解調四相移鍵控接收機的複雜電路。本設計是使用台積電提供的0.18微米CMOS製程，供應電壓為1.3伏特，頻率操作在433百萬赫茲。

In recent years, the development and application of the Internet of Things have become more and more extensive. There are some requirements for these devices, i.e., low power consumption, low cost, and small area. And the low power consumption is the main target in this work.
This thesis proposes a low power O-QPSK receiver and operates in 433-MHz ISM-band. Thus, the power-hungry low noise amplifier (LNA) was reduced at the front-end circuit. In addition, the inductors of the quadrature voltage control oscillator (QVCO) were implemented on a printed circuit board (PCB) and which serves as a high-Q antenna. The demodulation method is based on the injection locked technique that the RF signal is injected into QVCO. When an O-QPSK signal is injected into QVCO, the I/Q channel amplitude of oscillator is different due to phase shift from injected signal. This variation can be captured by the envelope detector and, thus, demodulates the O-QPSK signal to baseband. Therefore, this architecture can reduce the complexity of the conventional O-QPSK receiver and achieve low power. A 433 MHz O-QPSK receiver was implemented with a 0.18-μm CMOS process.

List of Figures ...VII
List of Tables ...IX
Chapter 1 Introduction ...1
1.1 Motivation and Goal ...1
1.2 Thesis Organization ...4
Chapter 2 Literature Review of Low Power Receiver ...5
2.1 Introduction ...5
2.2 Injection Locked Based Receiver ...5
2.2.1 On-Off Keying (OOK) and Frequency-Shifted Keying (FSK) Demodulation ...6
2.2.2 Phase-Shifted Keying (PSK) Demodulation ...7
2.3 Low Power Quadrature Phase-Shifted Keying (QPSK) Receiver ...9
2.4 Summary ...12
Chapter 3 Proposed Offset Quadrature Phase-Shifted Keying (O-QPSK) Receiver ...13
3.1 Introduction ...13
3.2 Proposed Receiver Architecture ...14
3.2.1 External Inductor Model ...17
3.2.2 Injection Locked QVCO ...21
3.2.3 Fully Differential Self-Biased Common Source Envelope Detector ...30
3.2.4 Integrator and Comparator ...34
3.2.5 Clock Generator ...41
3.2.6 Isolation Amplifier ...43
3.3 The Simulated Results of Low Power O-QPSK Receiver ...44
3.4 Layout and Floor Plan ...46
3.5 Summary ...47
Chapter 4 Test Setup and Experimental Results ...48
4.1 Introduction ...48
4.2 Test Setup ...48
4.3 Measurement Results ...52
4.4 Summary ...57
Chapter 5 Conclusion and Future Works ...61
5.1 Conclusion ...61
5.2 Future Works ...62
Reference ...63

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