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研究生:王儷靜
研究生(外文):Li-JingWang
論文名稱:可常溫操作的矽量子點單電子電晶體應用在反向器電路的可行性評估
論文名稱(外文):Assessment of Inverter Circuits using Silicon Quantum Dot-Based Single-Electron Transistors at Room Temperature
指導教授:江孟學
指導教授(外文):Meng-Hsueh Chiang
學位類別:碩士
校院名稱:國立成功大學
系所名稱:奈米積體電路工程碩士學位學程
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:英文
論文頁數:37
中文關鍵詞:單電子電晶體穿隧效應庫侖阻斷震盪效應單電子元件與電路模擬軟體互補式單電子電晶體反向器電路
外文關鍵詞:single-electron transistortunneling effectCoulomb blocking oscillation effectSIMONcomplementary single electron transistor inverter circuit
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自1964年摩爾定律問世,半導體製程技術便循著摩爾定律發展,現今已發展到五奈米節點。在尺寸微縮過程當中,短通道效應愈顯嚴重,量子侷限效應愈趨明顯,國際半導體技術發展路線圖(ITRS)因而提出許多新興元件,利用穿隧效應與庫侖阻斷震盪效應作為電子傳導的機制的單電子電晶體,不但改善短通道效應,與矽製程相容,還可以反過來利用量子侷限效應。然而其操作過程卻很容易受到環境溫度所導致的熱擾動影響,因此不利於實際在室溫下的應用。
在本篇論文中,我們從理論出發,估算可以在室溫下操作的單電子電晶體所需的條件;並參考已被發表的可在室溫操作的矽量子點單電子電晶體的模擬參數與實驗數據,利用單電子元件與電路模擬軟體(SIMON)建立互補式單電子電晶體反向器電路模型。
最後,我們以既有的元件參數及理論為基礎,藉由調整閘極電容與穿隧位障電容參數,討論如何讓電路雜訊容限變大而優化電路模型的直流特性,提出可行的電路設計方法。
Since the advent of Moore's Law in 1964, the evolution of semiconductor process technology has been progressed to 5nm technology node (N5). In the process of size reduction, the short channel effect becomes more serious, and the quantum confinement effect becomes more and more obvious. To solve these problems, the International Semiconductor Technology Development Roadmap (ITRS) proposes many emerging components. The single-electron transistor, using tunneling effect and Coulomb blocking oscillation effect as the mechanism of electron conduction, not only improves the short-channel effect, but is compatible with the silicon process, and can also use the quantum confinement effect in turn. However, its operation is easily affected by the thermal disturbance caused by the ambient temperature, so it is not suitable for practical application at room temperature.
In this thesis, we theoretically estimate the conditions required for a single-electron transistor that can be operated at room temperature; and refer to the published simulation parameters and experimental data of a silicon quantum dot single-electron transistor that can be operated at room temperature. We utilize SIMON, a single electron device and circuit simulator, to establish a model of complementary single electron transistor in-verter circuits.
Finally, based on the existing device parameters and theory, we adjust the parameters of gate capacitances and the tunneling barrier capacitances, discuss how to make the noise margin larger to optimize the DC characteristics of the circuit model, and propose a feasible circuit design methodology.
摘要.................................................. II
Abstract .............................................IV
誌謝..................................................VI
Table Captions .......................................IX
Figure Captions ......................................IX
Chapter 1 Introduction...........................................1
1-1 Background and Motivation .........................1
1-2 Fundamental of Single-Electron Transistors............................................5
1-2-1 Overview of Quantum Dots ........................6
1-2-2 Coulomb Blockade...............................................7
1-3 Introduction to the Simulation Tool .......................................................9
Chapter 2 Modeling Methodology for Silicon-Quantum Dot-Based Single-
Electron Transistors .................................12
2-1 Gibbs Free Energy for Single-Electron Systems ....12
2-2 Orthodox Theory of Single-Electron Tunneling .....15
2-3 Broadening of Energy States ......................17
Chapter 3 DC Transfer Characteristics of Single Electron Transistor Inverters.......19
3-1 Static SET Inverter DC Characteristics ...........20
3-2 Effects of Device Parameter Variation on the Noise Margin ...................23
3-2-1 Variation of VDD ...............................23
3-2-2 Distribution of Device capacitances ............................................25
3-3 Proposed Design for the Future Work..................................................29
Chapter 4 Conclusion .................................31
References............................................33
Appendix A The Calculation of Gibbs Free Energy for Single-Electron Systems 36
A-1 Electron Tunneling from Source to Quantum Dot ....36
A-2 Electron Tunneling from Quantum Dot to Source ....36
A-3 Electron Tunneling from Quantum Dot to Drain .....37
A-4 Electron Tunneling from Drain to Quantum Dot .....37
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