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研究生:周祥凱
研究生(外文):Chou, Siang-Kai
論文名稱:內建式接合線電阻老化感測之升壓轉換器設計
論文名稱(外文):A DC-DC Boost Converter Design With Embedded Bonding Wire Aging Measurement
指導教授:蘇朝琴
指導教授(外文):Su, Chau-Chin
口試委員:鄭國興黃育賢黃弘一
口試委員(外文):Cheng, Kuo-HsingHwang, Yuh-ShyanHuang, Hong-Yi
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2018
畢業學年度:107
語文別:中文
論文頁數:58
中文關鍵詞:電壓模式控制升壓轉換器交換式電容積分電路循序漸進式類比數位轉換器接合線電阻
外文關鍵詞:Voltage-mode control DC-DC Boost ConverterSwitched-Capacitor IntegratorSuccessive Approximation Analog to Digital ConverterBonding Wire Resistance
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本論文提出一種量測功率積體電路中接合線老化的方法,接合線的老化是影響功率晶片壽命的重要因素,其量測電路在電壓模式控制升壓轉換器下完成,在所提出內建式自我量測電路中,利用升壓轉換器PWM週期關掉的期間,加入預定的量測電流後,累積電壓將其放大和降低雜訊,接著透過循序漸進式類比數位轉換器,轉換出一組數位碼,此接合線電阻是可以用來監測其導線老化程度。
本晶片使用 TSMC 0.25μm 1P5M HV CMOS 製程,晶片系統操作頻率為 1MHz ,5V~12V 升壓轉換器最大效能為90.16%,在不同的製程參數下,接合線電阻在 60mΩ~140mΩ 情況下,所測得接合線電阻誤差皆為 5mΩ 內。
This thesis presents a methodology to measure the aging condition of the bonding wires in power integrated circuits since the aging of bonding wires is a significant factor that affects the lifetime of power chips. A test circuit is designed and integrated into a voltage mode boost converter for the feasibility study. In the proposed built in self measurement circuit, a predefined constant current is injected into the wires while the output stage is at the off period in a PWM cycle. The small voltage signals are integrated for the amplification and noise reduction purposes. Then, it is converted to digital by a successive approximation register ADC. Such a wire resistance can be used to monitor the aging condition of the wire.
This chip is fabricated in TSMC 0.25μm 1P5M HV CMOS process. The frequency of system clock is 1MHz. The maximum efficiency of the boost converter is 90.16%. When the bonding wire resistance is 60mΩ to 140mΩ , the measured bonding wire resistance error is not more than 5mΩ under different process parameters.
摘 要 i
Abstract ii
誌謝 iii
目錄 iv
表目錄 vii
圖目錄 viii
第一章 1
緒論 1
1.1簡介 1
前言 1
研究背景 2
1.2研究動機 3
1.3論文結構 4
第二章 5
直流轉直流轉換器概論 5
2.1簡介 5
2.2直流轉直流轉換器 6
線性穩壓轉換器 6
電容切換式轉換器 7
電感儲能切換式轉換器 8
2.3升壓型轉換器 9
設計原理與架構 9
元件選擇 11
2.4控制電路分類 14
電壓模式控制 (Voltage Mode Control) 15
電流模式控制 (Current Mode Control) 15
2.5電壓模式控制小訊號分析 16
轉換電路轉移函數及特性 17
脈衝寬度調變器轉移函數 19
補償增益Gc(S)轉移函數 20
第三章 22
接合線電阻老化量測機制 22
3.1簡介 22
3.2功率電晶體之封裝損壞和晶片元件損壞 23
3.3接合線電阻量測方式 24
3.4整體電路架構 26
交換式電容積分器 (Switched-Capacitor Integrator) 27
循序漸進式類比數位轉換器 (SAR ADC) 32
動態比較器 (Dynamic Comparator) 34
第四章 36
晶片佈局、模擬結果、量測考量 36
4.1簡介 36
4.2晶片佈局 37
4.3電壓模式控制直流升壓轉換器模擬結果 40
帶差參考電路 40
斜波訊號產生器 42
升壓轉換器電路 43
4.4循序漸進式類比數位轉換器模擬結果 47
循序漸進式類比數位轉換器 47
4.5接合線電阻老化量測結果 49
接合線電阻 49
4.6晶片規格 53
晶片規格表 53
量測考量 54
第五章 55
結論 55
5.1總結 55
5.2未來展望 55
參考文獻 56
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