摘 要 i
ABSTRACT ii
誌 謝 iii
Contents iv
Figure Captions vi
Table Captions viii
Chapter 1 Introduction 1
1.1 Background of Fully-Integrated Power Management 1
1.2 Category of Fully-Integrated Voltage Regulators 2
1.2.1 On-chip inductive power converters 3
1.2.2 Packaged bondwire-based inductive power converters 4
1.2.3 Capacitor-less linear regulators 5
1.2.4 Switched-capacitor DC-DC converters 6
1.2.5 Comparison 8
1.3 Motivation 9
1.4 Thesis Organization 9
Chapter 2 Prior Arts and Design Goals 10
2.1 Fundamental Analysis of Switched-Capacitor Converters 10
2.2 Prior Arts of Multi-Ratio SC Converters 12
2.2.1 Conversion efficiency versus conversion ratio 12
2.2.2 Successive-approximation SC converter 13
2.2.3 Recursive SC converter 14
2.2.4 Negator-based SC converter 16
2.3 Design Goals 17
Chapter 3 Proposed Asymmetrical Shunt SC Converter 18
3.1 Architecture of ASSC Converter 18
3.2 Charge Flow Analysis and Component Optimization 20
3.3 Loss Analysis and Comparison 23
3.3.1 Analysis of slow-switching limit impedance and performance metric 23
3.3.2 Analysis of bottom-plate parasitic loss and performance metric 26
Chapter 4 Design and Circuit Implementation 28
4.1 Structure of Three-Stage ASSC Converter 28
4.2 ARC Circuit 32
4.3 FORS Scheme 33
Chapter 5 Measurement Results 36
5.1 Chip Micrograph 36
5.2 FORS Scheme and Load-Transient Response 37
5.3 Reference Tracking Response 39
5.4 Statistic Results and Comparison Table 40
Chapter 6 Conclusion and Future Work 43
Reference 44

[1] S. Kudva and R. Harjani, “Fully-integrated on-chip DC-DC converter with a 450 × output range,” IEEE J. Solid-State Circuits, vol. 46, no. 8, pp. 1940–1951, Aug. 2011.
[2] C. Huang and P. K. T. Mok, “A 100 MHz 82.4% efficiency package-bondwire based four-phase fully-integrated buck converter with flying capacitor for area reduction,” IEEE J. Solid-State Circuits, vol. 48, no. 12, pp. 2977–2988, Dec. 2013.
[3] S. R. Sanders, E. Alon, H.-P. Le, M. D. Seeman, M. John, and V. W. Ng, “The road to fully integrated DC-DC conversion via the switched-capacitor approach,” IEEE Trans. Power Electron., vol. 28, no. 9, pp. 4146–4155, Sep. 2013.
[4] D. Somasekhar et al., “Multi-phase 1 GHz voltage doubler charge pump in 32 nm logic process,” IEEE J. Solid-State Circuits, vol. 45, no. 4, pp. 751–758, Apr. 2010.
[5] G. V. Piqué, “A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2012, pp. 98–100.
[6] T. M. V. Breussegem and M. S. J. Steyaert, “Monolithic capacitive DC-DC converter with single boundary-multiphase control and voltage domain stacking in 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 46, no. 7, pp. 1715–1727, Jul. 2011.
[7] N. Butzen and M. Steyaert, “A 1.1 W/mm2-power-density 82%-efficiency fully integrated 3:1 switched-capacitor DC-DC converter in baseline 28 nm CMOS using stage outphasing and multiphase soft-charging,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2017, pp. 178–179.
[8] N. Butzen and M. S. J. Steyaert, “Design of soft-charging switched-capacitor DC-DC converters using stage outphasing and multiphase soft-charging,” IEEE J. Solid-State Circuits, vol. 52, no. 12, pp. 3132–3141, Dec. 2017.
[9] N. Butzen and M. Steyaert, “A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2016, pp. 220–221.
[10] N. Butzen and M. S. J. Steyaert, “Scalable parasitic charge redistribution: Design of high-efficiency fully integrated switched-capacitor DC-DC converters,” IEEE J. Solid-State Circuits, vol. 51, no. 12, pp. 2843–2853, Dec. 2016.
[11] T. Tong, S. K. Lee, X. Zhang, D. Brooks, and G.-Y. Wei, “A fully integrated reconfigurable switched-capacitor DC-DC converter with four stacked output channels for voltage stacking applications,” IEEE J. Solid-State Circuits, vol. 51, no. 9, pp. 2142–2152, Sep. 2016.
[12] S. K. Lee, T. Tong, X. Zhang, D. Brooks, and G.-Y. Wei, “A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter,” in Proc. IEEE Symp. VLSI Circuits, Jun. 2015, pp. C318–C319.
[13] S. Bang, J.-S. Seo, L. Chang, D. Blaauw, and D. Sylvester, “A low ripple switched-capacitor voltage regulator using flying capacitance dithering,” IEEE J. Solid-State Circuits, vol. 51, no. 4, pp. 919–929, Apr. 2016.
[14] T.M. Andersen et al., “A sub-ns response on-chip switched-capacitor DC-DC voltage regulator delivering 3.7W/mm2 at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2014, pp. 90–91.
[15] D. El-Damak, S. Bandyopadhyay, and A. P. Chandrakasan, “A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2013, pp. 374–375.
[16] V. Ng and S. Sanders, “A 92%-efficiency wide-input-voltage-range switched-capacitor DC-DC converter,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2012, pp. 282–283.
[17] Y. K. Ramadass and A. P. Chandrakasan, “Voltage scalable switched capacitor DC-DC converter for ultra-low-power on-chip applications,” in Proc. IEEE Power Electron. Spec. Conf., 2007, pp. 2353–2359.
[18] Y. K. Ramadass, A. A. Fayed, and A. P. Chandrakasan, “A fully-integrated switched-capacitor step-down DC-DC converter with digital capacitance modulation in 45nm CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2557–2565, Dec. 2010.
[19] R. Jain et al., “A 0.45–1 V fully-integrated distributed switched capacitor DC-DC converter with high density MIM capacitor in 22nm tri-gate CMOS,” IEEE J. Solid-State Circuits, vol. 49, no. 4, pp. 917–927, Apr. 2014.
[20] B. Nguyen, N. Tang, W. Hong, Z. Zhou, and D. Heo, “High-efficiency fully integrated switched-capacitor voltage regulator for battery-connected applications in low-breakdown process technologies,” IEEE Trans. Power Electron., vol. 33, no. 8, pp. 6858–6868, Aug. 2018.
[21] A. Sarafianos and M. Steyaert, “Fully integrated wide input voltage range capacitive DC-DC converters: The folding Dickson converter,” IEEE J. Solid-State Circuits, vol. 50, no. 7, pp. 1560–1570, Jul. 2015.
[22] A. Sarafianos, J. Pichler, C. Sandner, and M. Steyaert, “A folding Dickson-based fully integrated wide input range capacitive DC-DC converter achieving Vout/2-resolution and 71% average efficiency,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Nov. 2015, pp. 1–4.
[23] C. K. Teh and A. Suzuki, “A 2-output step-up/step-down switched-capacitor DC-DC converter with 95.8% peak efficiency and 0.85-to-3.6V input voltage range,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2016, pp. 222–223.
[24] A. Sarafianos and M. Steyaert, “A modelling and design approach for push/pull switched capacitor DC-DC converters,” in Proc. IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), Jun. 2016, pp. 1–6.
[25] X. Wu et al., “A 66pW discontinuous switch-capacitor energy harvester for self-sustaining sensor applications,” in Proc. IEEE Symp. VLSI Circuits, Jun. 2016, pp. 90–91.
[26] H.-P. Le, J. Crossley, S. R. Sanders, and E. Alon, “A sub-ns response fully integrated battery-connected switched-capacitor voltage regulator delivering 0.19W/mm2 at 73% efficiency,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2013, pp. 372–373.
[27] M. D. Seeman and S. R. Sanders, “Analysis and optimization of switched-capacitor DC-DC converters,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 841–851, Mar. 2008.
[28] M. D. Seeman, “A design methodology for switched-capacitor DC-DC converters,” Ph.D. dissertation, EECS Department, Univ. California, Berkeley, CA, USA, 2009.
[29] S. Bang, D. Blaauw, and D. Sylvester, “A successive-approximation switched-capacitor DC-DC converter with resolution of V_IN/2^N for a wide range of input and output voltages,” IEEE J. Solid-State Circuits, vol. 51, no. 2, pp. 543–556, Feb. 2016.
[30] L. G. Salem and P. P. Mercier, “A recursive switched-capacitor DC-DC converter achieving 2^N-1 ratios with high efficiency over a wide output voltage range,” IEEE J. Solid-State Circuits, vol. 49, no. 12, pp. 2773–2787, Dec. 2014.
[31] L. G. Salem and P. P. Mercier, “A battery-connected 24-ratio switched capacitor PMIC achieving 95.5%-efficiency,” in Proc. IEEE Symp. VLSI Circuits, Jun. 2015, pp. C340–C341.
[32] W. Jung, D. Sylvester, and D. Blaauw, “A rational-conversion-ratio switched-capacitor DC-DC converter using negative-output feedback,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2016, pp. 218–219.
[33] D. Lutz, P. Renz, and B. Wicht, “A 10mW fully integrated 2-to13V-input buck-boost SC converter with 81.5% peak efficiency,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2016, pp. 224–225.
[34] Y. Jiang, M.-K. Law, P.-I. Mak, and R. P. Martins, “A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2018, pp. 422–424.
[35] Y.-T. Lin et al., “Unsymmetrical parallel switched-capacitor (UP-SC) regulator with fast searching optimum ratio technique,” in Proc. 43rd Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2017, pp. 287–290.
[36] S. Bang, A. Wang, B. Giridhar, D. Blaauw, and D. Sylvester, “A fully integrated successive-approximation switched-capacitor DC-DC converter with 31mV output voltage resolution,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2013, pp. 370–371.
[37] L. G. Salem and P. P. Mercier, “An 85%-efficiency fully integrated 15-ratio recursive switched-capacitor DC-DC converter with 0.1-to-2.2V output voltage range,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2014, pp. 88–89.
[38] S.-Q. Chen et al., “A high efficiency and fast transient digital low-dropout assisted switched-capacitor converter for EMI-free Internet of Everything (IoE) systems,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Nov. 2017, pp. 129–132.