Laterally diffused metal oxide semiconductor (本文簡稱: LDMOS)是一種非常熱門的 高壓元件，它的耐壓性極佳，運用範圍非常廣泛，本文的 LDMOS 是以 3.3V MOS 作為 基礎變化而來，閘極氧化層約為 75Å ，並非一般高壓元件有數百 Å 的厚度，本文的 LDMOS 崩潰電壓約在 20V 左右，其優點是可以節省光罩成本和製程成本，但缺點也明 顯的，這樣的結構限制只能運用在 15-30V 的範圍內，然而這也比一般 3.3V MOS (崩潰 電~10V)高上不少。 本文從幾個方向調整 LDMOS 的電性參數，一般來說想調整崩潰電壓會增加淺溝槽 長度，以及飄移區摻雜濃度做調整[1]-[3]，而本文共分四個部分，分別是有效通道佈局、 淺溝槽佈局、有效通道摻雜濃度、飄移區摻雜濃度，有效通道佈局和摻雜濃度主要是研 究飽和電流對崩潰電壓的影響，針對飽和電流的研究是由於功率和導通電阻，飽和電流 越大導通電阻也就越小，但飽和電流越大對元件衝擊也越大，崩潰電壓很可能會下降， 而淺溝槽佈局和飄移區濃度實驗則是為了提升崩潰電壓，並且這兩項實驗對導通阻影響 也是巨大的，在這些此彼消長的參數中找到最好的解答為本文主要目的。 元件的幾項重要電性參數為臨界電壓、飽和電流、崩潰電壓，本文中會針對這幾項 電性為實驗數據分析，根據不同的實驗，此三項參數會有不同的重要性。由實驗選出最 好的結果後，還要經過可靠度的驗證，單純的電性數據並不能表示一個元件是否可以使 用，但這都是後話了，也是未來可以再努力的方向。

Laterally diffused metal oxide semiconductor (LDMOS) is a very popular HV device. LDMOS have high breakdown voltage and a wide range of applications. LDMOS in this paper is based on the structure of 3.3V MOS of 110nm platform to design. The gate oxide thickness of the general HV device was over hundreds Å. But the gate oxide thickness of LDMOS in this paper was only 75Å, its breakdown voltage was about 20V. The advantage of keeping gate oxide thickness can save more cost and process time, but the disadvantages was obvious that breakdown voltage can’t achieve very high. Even so LDMOS breakdown voltage was also higher than the 3.3V MOS. There were several ways to adjust LDMOS electrical parameters in this paper. Generally, Breakdown voltage can be increased by adjusting the length of shallow trench and the doping concentration of the drift region [1]-[3]. Experiment in the paper separated to 4 parts as the effective channel layout, the shallow trench layout, the effective channel doping concentration, the drift region doping concentration. The effective channel layout and doping concentration are mainly to study the relative between saturation current (Idsat) and the breakdown voltage. Idsat would influence power and on-resistance. Idsat was higher and onresistance will be lower. Low on-resistance was the primary conditions of HV device. But the higher Idsat may lead to breakdown voltage decrease. The shallow trench length and the drift area concentration experiments are to increase the breakdown voltage. At the same time, these experiments would lead to on-resistance increased. Finding the best solution among these parameters is the main purpose of this paper. The important electrical parameters of the device are threshold voltage, saturation current, and breakdown voltage. Analyzing the electrical properties of LDMOS were the paper purpose. The best results are selected after analyzing the data of experiments, and then check reliability result. But reliability issue was a follow-up. This issue can be study in the future.

中文摘要 ……………………………………………………………… i
英文摘要 ……………………………………………………………… ii
誌謝 …………………………………………………………………… iii
目錄 …………………………………………………………………… iv
表目錄 ………………………………………………………………… vi
圖目錄 ………………………………………………………………… vii
符號說明 ……………………………………………………………… ix
一、緒論 ………………………………………………………………. 1
1.1 簡介…………………………………………………………… 1
1.2 研究目的和動機………………………………………….….. 3
二、元件理論探討 …………………………..………………………… 4
2.1 元件的崩潰原理 ………………………………………………. 4
2.2 低壓元件崩潰電壓之方法 ……………………………………. 6
2.3 基礎原理介紹 …………………………………………………. 8
2.3.1 熱載子效應 ……………………………………………….. 8
2.3.2 DIBL .………………………………………………………. 8
2.3.3 閉鎖效應 ………………………………………………….. 8
2.3.4 基體效應 ………………………………………………….. 9
2.3.5 Kirk effect …………………………………………………. 9
2.3.6 PN 接面 ……………………………………………………. 9
2.4 高壓元件的原理和結構 ………………………………………. 11
2.4.1 DDDMOS 結構和原理 ……………………………………. 11
2.4.2 LDMOS 結構和原理 ………………………………………. 13. 三、實驗規劃 ……………………………………………………………. 15
3.1 佈局設計……………………………….………………………… 15
3.1.1 有效通道佈局設計…………………………………………. 15
3.1.2 淺溝槽佈局設計……………………………………………. 17
3.1.3 製程限制與佈局實驗優點 ………………………………… 19
3.2 摻雜濃度實驗 …………………………………………………… 21
3.2.1 有效通道摻雜濃度實驗 …………………………………… 21
3.2.2 飄移區摻雜濃度實驗 ……………………………………… 22
3.3 電性量測 ………………………………………………………… 24
3.4 離子佈植介紹……………………………………………………… 27
四、 實驗結果 ……………………………………………………………. 28
4.1 佈局實驗結果與探討……………………………………………… 28
4.2 有效通道摻雜濃度實驗結果與探討 …………………………… 35
4.3 飄移區摻雜濃度實驗結果 ……………………………….……… 39
4.3.1 飄移區摻雜濃度實驗結果(深) ……………………….……… 39
4.3.2 飄移區摻雜濃度實驗結果(淺) ……………………………… 42
4.3.3 飄移區摻雜濃度實驗結果(合併) …………………………… 45
4.4 元件崩潰路徑驗證 ..……………………………………………… 46
五、 結論 ..……………………………………………………………….. 49
5.1 佈局組實驗結論 ..………………………………………………… 49
5.2 摻雜濃度實驗結論 ..……………………………………………… 51
5.3 總結 ..………………………………………….…………………… 53
參考文獻 …..……………………………………………………………… 54

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