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研究生:莫恆
研究生(外文):MO, HENG
論文名稱:50GHz對稱型背導式共平面波導於鑽孔玻璃基板之研究
論文名稱(外文):The Study of 50 GHz Wideband Symmetrical Conductor-Backed Coplanar Waveguide on Through Glass Via Substrate
指導教授:邱建良邱建良引用關係
指導教授(外文):CHIU, CHIEN-LIANG
口試委員:許益誠蘇德仁陳聰毅
口試委員(外文):HSU, YI-CHENGSU, TE-JENCHEN, TSONG-YI
口試日期:2019-03-15
學位類別:碩士
校院名稱:國立高雄科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:93
中文關鍵詞:Conductor-Backed Coplanar WaveguideThrough Glass ViaTransmission Line
外文關鍵詞:背導式共平面波導玻璃通孔傳輸線
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本論文設計並製作出一個可用於50 GHz的背導式共平面波導結構(Conductor-Backed Coplanar Waveguide, CB-CPW),將其建構於鑽孔玻璃基板(Through Glass Via, TGV)之上,並設計數對孔洞填充金屬連接至接地層,且採用背導式共平面波導將訊號線導入基板下方,以達到上下層皆有訊號線之功能,考量後續實際製作量測之方便性,將其設計更改為對稱式結構。
使用高頻電磁模擬軟體(Ansys HFSS)對設計進行散射參數(S-parameter)模擬分析,模擬之鑽孔玻璃基板厚度為300 μm,訊號線寬度為130 μm,其與兩側返回導體之間距為23 μm,模擬結果於50 GHz時反射損耗(S11)為-26.7 dB、插入損耗(S21)為-0.45 dB,全頻段最小反射損耗為-23.4 dB而最大插入損耗為-0.45 dB,整體結構之阻抗為50.02Ω。
鑽孔設計在單孔洞孔徑為200 μm之結構可得到的最大S11為-15.31 dB與最小S21為-1.03 dB。在雙孔洞孔徑為200 μm之結構可得到的最大S11為-15.95 dB與最小S21為-0.96 dB。在三孔洞孔徑為200 μm之結構可得到的最大S11為-16.72 dB與最小S21為-0.89 dB,三者設計頻寬皆可達到50 GHz。
玻璃基板使用鑽石雷射進行鑽孔加工,透過電子束蒸鍍沉積鈦(Ti)/銅(Cu)薄膜作為晶種層,再藉由化學電鍍於孔洞內沉積銅柱,經過研磨、拋光製程去除基板表面多餘的金屬材料,並維持基板之平整性,再以黃光微影製程將設計之電路圖形微縮於基板之上。
最後利用網路分析儀連接高頻纜線至G-S-G探針量測其散射參數(S11與S21),其量測結果得到全頻段最小S11為-12.01 dB與最大S21為-3.12 dB,於50 GHz時S11為-12.25 dB而 S21為-2.83 dB,本論文成功研製出一個反射損耗(S11)小於-10 dB且插入損耗(S21)小於-3dB的50 GHz傳輸線。

A 50 GHz wideband conductor-backed coplanar waveguide is applied for through glass via substrate, and design few pairs of via filling the metal to be connected to the ground layer. Use conductor-backed coplanar waveguide, let front side and back side both have signal line. Consider the accessibility in production and measure, we add the design to be a symmetric pattern.
Use High Frequency Structure Simulator(HFSS) to simulation in S-parameter, the thickness of glass substrate was 300 μm, the signal line width was 130 μm, and the distance between the returning conductors G-S-G was 23 μm. The simulation results show that the reflection loss is -26.7 dB at 50 GHz, the insertion loss is -0.45 dB, the minimum reflection loss in the full band is -23.4 dB, the maximum insertion loss is -0.45 dB, and the impedance of the overall structure is 50.02 Ω.
Via design can achieve a maximum reflection loss of -15.31 dB and a minimum insertion loss of -1.03 dB in a single-via structure aperture of 200 μm. The maximum reflection loss of -15.95 dB and the minimum insertion loss of -0.96 dB can be obtained in a structure with a double-via structure aperture of 200 μm. In three-via structure aperture of 200 μm the maximum reflection loss is -16.72 dB and the minimum insertion loss is -0.89 dB. The design bandwidth of the three can reach 50 GHz, and the loss is also close to limit, no more reduced.

中文摘要
ABSTRACT
致謝
研究目錄
圖目錄
第一章 緒論
1.1 研究動機
1.2 論文架構
第二章 文獻探討
2.1 電磁波與頻譜
2.2 傳輸線基本理論
2.2.1 傳播模態
2.2.2 電介質基板合成與分析參數
2.3 傳輸線衰減與損失
2.3.1 導體損耗
2.3.2 介質損耗
2.3.3 輻射損耗
2.4 共平面波導傳輸線
2.5 共平面波導連通柱技術
第三章 背導式共平面波導模擬與設計
3.1 設計流程
3.2 傳輸線特徵阻抗分析
3.2.1 傳輸線歐姆特性試算
3.3 多對背導式共平面波導結構設計
3.4 導電連通柱結構設計
3.4.1 連通柱數量與尺寸設計
3.4.2 連通柱填充模型模擬
3.5 線寬誤差可容忍度模擬
第四章 研究方法及製作流程
4.1 實驗製作流程
4.2 鑽孔玻璃基板製作
4.2.1 玻璃基板通孔佈局
4.3 背導式共平面波導光罩佈局
4.4 通孔沉積金屬材料製程實驗
4.4.1 玻璃基板前處理作業
4.4.2 晶種層製作
4.4.3 電鍍製程
4.4.4 研磨及拋光製程
4.5 背導式共平面波導製作
4.5.1 黃光微影製程
4.5.2 金屬蒸鍍與光阻掀離製程
第五章 量測結果
5.1 量測設備
5.2 孔洞電性量測結果
5.2 S參數量測結果
第六章 研究結論
未來展望
參考文獻
附錄

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