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研究生:魏鴻瑋
研究生(外文):Wei, Hung-Wei
論文名稱:應用於第五代無線通訊系統CMOS射頻發射機前端積體電路設計
論文名稱(外文):Design of 5th Generation Wireless System CMOS RF Transmitter Front-end Integrated Circuits
指導教授:葉美玲葉美玲引用關係
指導教授(外文):Yeh, Mei-Ling
口試委員:林嘉洤黃淑絹葉美玲
口試委員(外文):Lin, Jia-ChuanHuan, Shu-ChuanYeh, Mei-Ling
口試日期:2019-01-18
學位類別:碩士
校院名稱:國立臺灣海洋大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:87
中文關鍵詞:功率放大器電壓控制振盪器混頻器
外文關鍵詞:power ampilifiervoltage-controlled oscillatormixer
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本論文研究應用於5G行動通訊之射頻發射機前端積體電路,其電路包含功率放大器、電壓控制振盪器與混頻器。電路設計使用國家晶片系統中心所提供的Agilent Advanced Design System進行模擬,製程採用TSMC 180nm 1P6M CMOS Mixed-Signal模型。
低功耗功率放大器,使用電流再利用的電路架構來達到降低消耗功率,並使用線性化偏壓電路來增加線性度,搭配第二級共源極放大器來增加輸出功率。在模擬電路頻率於28GHz時,功率轉換增益為12dB,輸出1dB增益壓縮點(OP1dB)為7.7dBm,輸出三階截取點(OIP3)為32dBm,功率增加效率(PAE)為15%,功率消耗為37.8mW,晶片面積0.836 * 0.836 mm2。
寬調諧範圍電壓控制振盪器,使用電容開關可以提升整體調諧範圍,在模擬時可得到20.7%的調諧範圍,最高輸出功率為-4.4dBm,相位雜訊為-104.036dBc/1MHz,性能指標FOMT為-189.55,在供應電壓1.8V下,消耗功率為9.6mW,晶片面積為0.76 mm2。量測時可得到11%的調諧範圍,輸出功率-4.84 dBm,其相位雜訊在1MHz偏移時為-93.8 dBc/1MHz,性能指標FOMT為-172,功率消耗為8.62mW。
高轉換增益升頻混頻器,採用雙端平衡式架構,在轉導級採用電流注入技術來提高轉換增益與線性度,輸出負載級利用共源級放大器將轉換增益再次提高,模擬時可得到轉換增益為17.5dB,OP1dB為1.4dBm,P1dB為-16dBm,OIP3為7.2dBm,LO-IF隔離度為59.77dBm,LO-RF隔離度為43.04dBm,IF-RF隔離度為105.68dBm,功率消耗為64.8mW,晶片面積為1.2*1.23 mm2。

關鍵詞:功率放大器、電壓控制振盪器、混頻器
In this thesis, we design CMOS RF transmitter front-end integrated circuits of the 5th generation wireless system, which compose of a power amplifier, a voltage-controlled oscillator, and a mixer. These circuits are designed with Agilent Advanced Design System (ADS) software and TSMC 180nm 1P6M CMOS Mixed-Signal model provided by National Chip Implementation Center.
The low-power power amplifier uses current reused circuit architecture to achieve lower power consumption, and uses the linear bias circuit to increase the linearity. The second stage adopts common source amplifier to increase the output power. When the operating frequency of the simulated circuit is 28GHz, the power conversion gain is 12dB, the output 1dB gain compression point (OP1dB) is 7.7dBm, the output third-order intercept point (OIP3) is 32 dBm, the power added efficiency (PAE) is 15%, the power dissipation is 37.8mW, and the chip area is 0.836 * 0.836 mm2.
The wide tuning range voltage-controlled oscillator uses a capacitor switch to improve tuning range. The simulation shows that the tuning range is up to 20.7%, the output power is -4.4dBm, the phase noise is -104.036dBc/Hz at 1MHz offset, the performance indicators FOMT is -189.55dBc. When the supply voltage is 1.8V, the power consumption is 9.6 mW and the chip area is 0.76 mm2. The measurement results show that the tuning range is up to 11%, the output power is -4.84dBm, the phase noise is -93.8 dBc/Hz at 1MHz offset, the performance indicators FOMT is -172.5dBc, and the power consumption is 8.62 mW.
The high conversion gain up-conversion mixer utilizes double balanced architecture. In the transconductance stage, we use current injection technology to improve conversion gain and linearity, and in the output load stage we use common source amplifier to increase the conversion gain again. The simulation results show that the conversion gain is 17.5dB, the OP1dB is 1.4dBm, the P1dB is -16dBm, the OIP3 is 7.2dBm, the LO-IF isolation is 59.77dBm, the LO-RF isolation is 43.04dBm, the IF-RF isolation is 105.68dBm, the power consumption is 64.8mW, and the chip area is 1.2*1.23 mm2.

Keywords: power amplifier, voltage-controlled oscillator, mixer
摘要…………………………………….……………………………………………...I
Abstract………………………………………………………………………………..II
目錄…………………………………………………………………………………..III
圖目錄………………………………………………………………………………...V
表目錄………………………………………………………………………………VII
第一章 緒論…………..…............................................................................................1
1.1 研究動機……………………………………………………………………..1
1.2 無線通訊系統介紹…………………………………………………………..1
1.3 Ka-Band近期發展……………………………………………………...…...3
1.4 論文架構……………………………………………………………………..4
第二章 功率放大器…………………………………………………………………..6
2.1 功率放大器介紹……………………………………………….……………..6
2.2 功率放大器原理與架構………………………………………….…………..6
2.2.1 放大模式放大器………………………………………………..…………6
2.2.2 切換式放大器………………………………………..................................9
2.3 功率放大器的參數……………………………………………….…………..9
2.3.1 1dB增益壓縮點…………………………………………………..…….…9
2.3.2 電路穩定度……………………………………………………..………..10
2.3.3效率……………………………………………………………..……...…11
2.4 Ka-Band低功耗功率放大器設計……………………………….………….12
2.4.1 電路架構……………………….. ………………………………..……...12
2.4.2 電路模擬結果………………………………………………..…………..14
2.4.3 量測結果探討………………………………………………..…………..27
2.4.4 結論………………………………………………....................................30
第三章 電壓控制振盪器……………………………………………………………31
3.1 電壓控制振盪器介紹……………………………………….………………31
3.2 電壓控制振盪器的原理及架構………………………………….…………31
3.2.1迴路分析法與巴克豪森準則……………………….................................31
3.2.2負電組分析法…………………………………………………..………...32
3.2.3 環形振盪器及LC諧振振盪器……………………………….…………32
3.3 電壓控制振盪器的參數………………………………………….…………34
3.3.1調諧範圍………………………………………………………..………...34
3.3.2相位雜訊………………………………………………………..………...35
3.3.3 輸出功率………………………………………………………..………..40
3.3.4 消耗功率………………………………………………………..………..40
3.4 Ka-Band寬調諧範圍電壓控制振盪器設計………………….…………….41
3.4.1 電路架構……………………………………………………….….……..41
3.4.2 電路模擬結果…………………………………………………..………..42
3.4.3 量測結果與探討………………………………………………..………..56
3.4.4 結論……………………………………………………………..………..60
第四章 混頻器………………………………………………………………………62
4.1 混頻器介紹………………………………………………….………………62
4.2 混頻器原理…………………………………………………….……………62
4.3 混頻器架構………………………………………………………….………64
4.3.1 被動式混頻器…………………………………………………..………..64
4.3.2 主動式混頻器…………………………………………………......……..65
4.4 混頻器的參數……………………………………………………….………67
4.4.1 轉換增益…………………………………………………………..……..68
4.4.2 三階交越截止點…………………………………………..……………..68
4.4.3 隔離度…………………………………………………………..………..70
4.5 Ka-Band高轉換增益升頻混頻器設計…………………………….……….71
4.5.1 電路架構………………………………………………………..………..71
4.5.2 電路模擬結果………………………………………………..…………..73
4.5.3 結論…………………………………………………………..…………..83
第五章 總結及未來展望……………………………………………………………85
參考文獻……………………………………………………………………………..86
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