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研究生:鄧鼎弘
研究生(外文):Ting-Hung Teng
論文名稱:雙模式控制及隨負載變頻控制高效能 降壓式轉換器
論文名稱(外文):Dual Mode Control with Variable Frequency load following Control for High Performance Buck Converter
指導教授:林景源林景源引用關係邱煌仁
指導教授(外文):Jing-Yuan LinHuang-Jen Chiu
口試委員:邱煌仁劉邦榮黃仁宏林景源
口試委員(外文):Huang-Jen ChiuPang-Jung LiuPeter HuangJing-Yuan Lin
口試日期:2019-06-27
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:67
中文關鍵詞:漣波調變定截止時間 控制降壓型轉換器隨負載變頻機制
外文關鍵詞:Fixed Off-time Control (FOT)Buck ConverterVariable Frequency load following Control (VFC)
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為了改善在不同輸出負載下的切換頻率,本論文提出使用漣波調變定截止時間控制的降壓型轉換器 並加上隨負載變頻機制和波峰電壓切換機制,提升轉換效能。一般來說,輕載時轉換效能由切換損耗主導功率 開關切換若使用硬切換控制會導致損耗較大使效率降低。本文所提出的波峰電壓切換機制能讓切換 損耗降低。重載時因為整體電路操作於連續電流模式(CCM)且加上本文提出的隨負載變頻機制(VFC)使電路能維持在較高的轉換效能。
本晶片以TSMC T25HVG2製程實現,晶片面積含PADs為3.01×1.34 mm2。功率級電壓輸入與控制級電壓輸入皆為5V、輸出電壓1.8V,切換頻率為500kHz,外接電感與電容分別為6.9μH與10μF,負載範圍為 50mA至1A。當負載為100mA時,使用PWM控制來輔助切換頻率定頻;當負載為150mA時,波峰電壓切換機制便會啟動使輕載時的切換損耗下降;當負載為 500mA時,隨負載變頻機制便會啟動,試著讓重載時的切換頻率下降。
In order to improve the switching frequency under different output loads, this thesis proposes a buck converter using Fixed Off-time Control, and adding a variable frequency control with load and a peak voltage switching mechanism to improve the conversion efficiency. In general, the conversion efficiency is dominated by the switching loss at light load. If the power mosfet uses hard switching control, the switching loss will be large and conversion efficiency will be reduced.The peak voltage switching mechanism proposed in this paper can reduce the switching loss. During heavy load, the overall circuit operates in continuous current mode (CCM) and Variable Frequency load following Control (VFC) proposed in this paper enables the circuit to maintain high conversion efficiency.
The chip had been implemented with TSMC T25HVG2 technology and the size of chip including pads was 3.01×1.34 mm2. The power stage voltage input is 5V and the control voltage input is 5V. The output voltage is 1.8V and the switching frequency is 500k Hz. The external inductance and capacitance are 6.9μH and 10μF. The output load range is 50mA to 1A. When the load is 100mA, the PWM function is turned on to assist the switching frequency to a constant value; when the load is 150mA, the peak switching mechanism is turned on to reduce the switching loss at light load; when the load come to 500mA, variable frequency control with load will be turn on, it will reduce the switching frequency at heavy load.
摘要
ABSTRACT
誌謝
目錄
圖目錄
第一章 緒 論
1.1研究動機與目的
1.2論文大綱
第二章 漣波調變定截止時間控制與隨負載變頻機制之分析
2.1漣波調變定截止時間控制原理與穩定條件
2.2漣波調變定截止時間控制之切換頻率變化
2.3隨負載變頻機制之分析
第三章 波峰電壓切換控制與脈衝寬度調變控制之分析
3.1波峰電壓切換機制之分析
3.2脈衝寬度調變控制之分析
第四章 電路實現
4.1 系統整體架構簡介
4.2 子電路設計
4.2.1上臂開關電流偵測電路
4.2.2固定截止時間電路
4.2.3波峰電壓切換電路
4.2.4隨負載變頻電路
4.2.5三角波產生器電路
第五章 模擬結果
5.1 波峰電壓切換機制與隨負載變頻機制之波形
5.2 模擬結果比較與討論
第六章 晶片量測結果
6.1 晶片佈局圖
6.2 晶片腳位配置與定義
6.3 晶片量測結果
第七章 結論與未來展望
7.1結論
7.2未來展望
參考文獻
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[3] Daniel W. Hart, Power Electronics. McGraw-Hill, 2010 1nd.
[4] R. Redl and J. Sun, “Ripple-based control of switching regulators-An overview,” IEEE Trans. Power Electron., vol. 24, no. 12, pp. 2669-2680, Dec. 2009.
[5] Rohm semiconductor Application Notes, “Efficiency of Buck Converter : Power Management”Dec. 2016
[6] B. C. Bao, X. Zhang, J. P. Xu and J. P. Wang, "Critical ESR of output capacitor for stability of fixed off-time controlled buck converter," in Electronics Letters, vol. 49, no. 4, pp. 287-288, 14 Feb. 2013.
[7] C. Yeh and Y. Lai, "Novel hybrid control technique with constant on/off time control for DC/DC converter to reduce the switching losses," 2009 International Conference on Power Electronics and Drive Systems (PEDS), Taipei, 2009, pp. 848-853.
[8] C. Yeh, X. Zhao and J. Lai, "An investigation on zero-voltage-switching condition in synchronous-conduction-mode buck converter," 2017 IEEE Energy Conversion Congress and Exposition (ECCE), Cincinnati, OH, 2017, pp. 1728-1732.
[9] Z. Liu and H. Lee, "A Wide-Input-Range Efficiency-Enhanced Synchronous Integrated LED Driver With Adaptive Resonant Timing Control," in IEEE Journal of Solid-State Circuits, vol. 51, no. 8, pp. 1810-1825, Aug. 2016.
[10] Cheung Fai Lee and P. K. T. Mok, "A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique," in IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 3-14, Jan. 2004.
[11] L. Shi and L. Xu, "Frequency compensation circuit for adaptive on-time control buck regulator," in IET Power Electronics, vol. 7, no. 7, pp. 1805-1809, July 2014.
[12] C. Huang and C. Chen, "A High-Efficiency Current-Mode Buck Converter With a Power-Loss-Aware Switch-On-Demand Modulation Technique for Multifunction SoCs," in IEEE Transactions on Power Electronics, vol. 31, no. 12, pp. 8303-8316, Dec. 2016.
[13] Yu-Kang Lo, Jing-Yuan Lin, Chao-Fu Wang and Chien-Yu Lin, "Analysis and design of a dual-mode flyback converter," 2010 IEEE International Conference on Sustainable Energy Technologies (ICSET), Kandy, 2010, pp. 1-3.
[14] Roland van Roy,「消除Buck轉換器中的 EMI問題」,立錡科技股份有限公司,2016年1月。
[15] 詹子增,"雙模式降壓型功率因數修正器之研製",國立臺灣科技大學電機研究所碩士論文,民國一百零三年技大學電機研究所碩士論文,民國一百零三年
[16] W. Liou, T. Chen, Y. Kuo, T. Huang and M. Yeh, "A High Efficiency Dual-Mode Buck Converter IC For Portable Applications," 2007 International Conference on Communications, Circuits and Systems, Kokura, 2007, pp. 1011-1015.
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