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研究生:陳羿汶
研究生(外文):Yi-Wen Chen
論文名稱:氮化鎵及CMOS震盪器與高偶模注入式鎖定除頻器之研究
論文名稱(外文):GaN HEMT and CMOS Oscillators and High Even-Modulus Injection-Locked Frequency Divider
指導教授:張勝良
指導教授(外文):Sheng-Lyang Jang
口試委員:張勝良莊敏宏溫俊瑜黃進芳
口試委員(外文):Sheng-Lyang JangMiin-Horng JuangJiun-Yu WenJhin-Fang Huang
口試日期:2019-07-25
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:英文
論文頁數:142
中文關鍵詞:壓控震盪器注入鎖定除頻器注入鎖定震盪器氮化鎵
外文關鍵詞:VCOILFDILOGAN
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  在RF射頻收發機中,頻率合成器的特性非常重要,內部包含了相位偵測器(PFD)、充電幫浦(CP)、迴路濾波器(LF)、壓控振盪器(VCO)、除頻器(FD),而這其中又以壓控振盪器和注入鎖定除頻器特性為主要電路。壓控振盪器需要低相位雜訊來避免相鄰雜訊訊號經由混波轉換的干擾,壓控振盪器的輸出在經由除頻器來達到降頻的工作,因此除頻器必須具有高的操作頻寬與頻率。本篇論文提出兩種振盪器與一除頻器。
  首先,我們探討一個使用穩懋0.25微米氮化鎵(GaN)製程之2.5 GHz低相位雜訊GaN HEMT振盪器。此振盪器使用雙迴授結構,一迴授藉由變壓器耦合;另一迴授使用π型低通濾波器作為迴授電路,並利用緩衝器優化振盪器之特性。在輸入14.9 mW之功率下,此電路能產生5.2 GHz之訊號,並由5.2 GHz之載波於1 MHz頻率偏移中,得一相位雜訊為-125.77 dBc/Hz,計算所得到的FoM為 -188 dBc/Hz,此電路的面積為2×1 mm2。
  其次,本篇量測一個使用台積電0.18矽鍺微米製程之無變容器D型LC諧振注入鎖定震盪器,此振盪器使用雙注入MOSFET耦合信號,供給於D型震盪器,並被使用為諧波混頻器。此次的量測在供給電壓0.7 V下,其消耗功率為8.77 mW,輸出電壓振幅為供給電壓之3倍,並得一鎖定範圍2.41 GHz ~ 2.86 GHz。因為高電壓振幅輸出,可得更大之2次諧波信號,所以此電路可作為一注入鎖定倍頻器。
  第三,本篇設計並分析一電流重用佈局之寬鎖定範圍高偶數模LC共振腔注入鎖定除頻器,電流重用LC注入鎖定除頻器,係利用兩堆疊LC次注入鎖定除頻器,共用直流電流而組成。兩次注入鎖定除頻器皆為了得到高轉換增益,而使用nMOSFET作為線性注入混頻器。此電路使用台積電0.18微米製程,以÷4及÷2作為次注入鎖定除頻器,在供給電壓為1.6 V及注入功率為0 dBm下,從注入頻率8.3 GHz ~ 12.3 GHz,得一鎖定範圍為4GHz (38.835 %),其功耗為13.98 mW,晶片面積為1.2 × 1.2 mm2。由於雙諧振震盪器被應用於n核無變容器之注入鎖定除頻器中,使得÷8 LC注入鎖定除頻器及÷4次注入鎖定除頻器,皆有非重疊與重疊之鎖定範圍,LC雙諧振震盪器現象是由於寄生於主動FET、晶片上的螺旋電感及感應元件上之電容產生,其可用於獲得寬頻的鎖定範圍。在設計之電路中也將探討兩個固有的÷4注入鎖定除頻器。
In the RF transceiver, frequency synthesizer is very important, its blocks include Phase Frequency Detector (PFD), Charge Pump (CP), Loop Filter (LF), Voltage Controlled Oscillator (VCO), and Frequency Divider (FD). In order to pursue the most important characteristics performance of VCO and Divider, low-power, low phase noise, wide Locking range, this thesis presents the design GaN HEMT oscillator and Injection-Locked Frequency Dividers (ILFDs).
First, this thesis designs a low-phase noise 5.4 GHz GaN HEMT oscillator with GaN-on-SiC HEMT foundry process of WIN semiconductors. The oscillator uses a dual-feedback technique, the first feedback uses a transformer coupling feedback and the second feedback uses a low-pass π-filter feedback. The GaN oscillator uses buffer to characterize the oscillator performance. At the power 14.9 mW the oscillator generates a signal at 5.4 GHz. At 1MHz frequency offset from the carrier at 5.4 GHz the phase noise is -129.32 dBc/Hz, the figure of merit (FoM) of the proposed oscillator is -192 dBc/Hz. The dual-feedback oscillator uses a chip size of 2×1 mm2.
Secondly, in this thesis, a Class D varactor-free LC-resonator injection-locked oscillator (ILO) in the TSMC 0.18 μm BiCMOS process is presented. The ILO uses two shunt injection MOSFETs to couple injection signal to the Class-D oscillator. The injection MOSFET are used as harmonic mixer. The ILO output swing is about 3 times of supply voltage. At the supply voltage of 0.7 V and the ILO-core power consumption 8.77 mW, the locking range is from 2.41 GHz to 2.86 GHz. The high voltage swing leads to higher 2nd harmonic output signal, the circuit is a useful injection locked frequency doubler.
Finally, this thesis designs and analyzes wide locking range high even-modulus LC-tank ILFDs with current-reused topologies. The current-reused LC ILFDs use two stacked LC sub-ILFDs sharing the same dc current. Both sub-ILFDs use nMOSFETs as linear injection mixers for high conversion gain. For the ÷8 LC ILFD designed in the TSMC 0.18 μm CMOS process, the circuit uses one ÷4 and one ÷2 sub-ILFD, at the supply of 1.6 V and at the incident power of 0 dBm, the locking range is 4 GHz (38.835 %), from the incident frequency 8.3 GHz to 12.3 GHz. The ILFD core power consumption is 13.98 mW and the die size is 1.2 × 1.2 mm2. Both the ÷8 LC ILFD and the ÷4 sub-ILFD have non-overlapped and overlapped locking ranges, which are due to a dual-resonance resonator used in the varactor-free n-core ILFDs. The LC dual-resonance resonator is owing to parasitic capacitors in active FETs and on-chip spiral inductors and inductive elements, and it is used to get wide overlapped locking range. Two ÷4 LC ILFDs inherent in the designed circuit are also studied.
氮化鎵及CMOS震盪器與高偶模注入式鎖定除頻器之研究 I
中文摘要 …………………………………………………………………………..I
Abstract ………………………………………………………………………...III
誌謝 ………………………………………………………………………….V
Table of Contents ………………................VI
List of Figures ………………………………………………………………………VIII
List of Tables ………………………………………………………………………XII
Chapter 1 Introduction 1
1.1 Background 1
1.2 Thesis Organization 4
Chapter 2 Overview of Voltage-Controlled Oscillators 5
2.1 Introduction 5
2.2 The Oscillators Theory 7
2.2.1 One-Port (Negative Resistance) View 8
2.2.2 Two-Port (Feedback) View 10
2.3 Design Concepts of Voltage-Controlled Oscillator 13
2.3.1 Parameters of a Voltage-Controlled Oscillator 14
2.3.2 Phase Noise 16
2.3.3 Quality Factor 21
2.4 Type of the LC Oscillator 23
2.4.1 Single Transistor Oscillator 25
2.4.2 One-Port Oscillator (Negative-Gm Oscillator) 28
2.4.3 Cross-Coupled Oscillator 33
2.4.4 Complementary Cross-Coupled Topology 35
2.5 Classification of Oscillators 37
2.5.1 Ring Oscillator 37
2.5.2 LC-Tank Oscillator 42
2.6 Research in RLC-Tank 46
2.6.1 Resistors 47
2.6.2 Inductor 48
2.6.3 Transformer 54
2.6.4 Capacitor 59
2.6.5 Varactors 61
Chapter 3 Overview of Injection Locking Frequency Divider 65
3.1 Introduction 65
3.2 Principle of Injection Locked Frequency Divider 67
3.3 Locking Range 69
Chapter 4 GaN HEMT Oscillator Using Transformer and Colpitts Feedback Techniques 72
4.1 Introduction 72
4.2 Circuit Design 74
4.3 Measurement and Discussion 77
Chapter 5 Class-D LC-tank Capacitive Cross-Coupled Injection-Locked Oscillator and Frequency Doubler 84
5.1 Introduction 84
5.2 Circuit Design 86
5.3 Measurement and Discussion 88
Chapter 6 High Even-Modulus Injection-Locked Frequency Dividers 96
6.1 Introduction 96
6.2 Divide-by-4 ILFDs 99
6.3 Divide-by-8 ILFD 103
6.3.1 Circuit Design of the Divide-by-8 ILFD 103
6.3.2 Experimental of the Divide-by-4 ILFD 112
Chapter 7 Conclusions 116
References 118
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