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研究生:吳源輝
研究生(外文):WU, YUAN-HUI
論文名稱:混合模式差動輸出參考電壓設計
論文名稱(外文):Design of Mixed-mode Differential Output Reference Voltages
指導教授:劉偉行劉偉行引用關係
指導教授(外文):LIU, WEI-HSING
口試委員:韓端勇劉偉行沈自
口試委員(外文):HAN, TUAN-YUNGLIU, WEI-HSINGSHEEN, JYH
口試日期:2019-07-17
學位類別:碩士
校院名稱:國立虎尾科技大學
系所名稱:電子工程系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:107
語文別:中文
論文頁數:69
中文關鍵詞:參考電壓零溫度係數弱反轉區差動輸出
外文關鍵詞:reference voltagezero temperature-coefficientweak-inversiondifferential-mode
相關次數:
  • 被引用被引用:1
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  • 下載下載:13
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本論文提出兩種混合模式差動輸出參考電壓電路。第一種電路輸出端為傳統的差動模式輸出;第二種電路則是串連一顆MOS電晶體作為電壓位準的提升。

相較於以往的參考電壓電路都是結合正/負溫度係數特性,選擇適當的權重比例互相抵消產生零溫度係數的參考電壓,本論文提出的電路利用BJT所產生的負溫度係數特性與MOS電晶體的臨界電壓具有的負溫度係數特性,選擇適當的權重比例互相抵消,藉以完成具有零溫度係數的參考電壓。相較於已知電路,本論文提出之電路架構簡單,除了不需要使用運算放大器外,還具有使用較少晶片面積等優點。

本論文除了詳細敘述工作原理之外,並使用TSMC 0.35微米和TSMC 0.18微米製程參數及HSPICE模擬軟體針對電路進行佈局前/後模擬與晶片實作;佈局前/佈局後模擬結果與理論互相符合,也證明電路的可能性。本論文所提出之混合模式差動輸出電壓電路可適用於各種類比積體電路。

  In this thesis, two Mixed-Mode Differential Output Reference Voltage Circuits have been proposed. The output of the first proposed circuit is with traditional differential output structure and a series-connected MOSFET is used at the output of the second proposed circuit as the level-shifter.

  Comparing with the existed reference voltage circuits, which were usually combined with the positive/negative temperature-coefficient characteristics with selected weighting ratios to generate a zero temperature-coefficient reference voltages, the proposed circuits utilize only the negative temperature-coefficient characteristic from BJT junction voltage and the threshold voltage of MOSFET to eliminate each other so we can achieve a zero temperature-coefficient reference voltage circuits. Compared with the known circuits, the circuits proposed in this thesis are with simpler circuit structure, less chip area, and there is no operational amplifier needed in the proposed designs.

  Detailed working principles have been explored in this thesis. Both the proposed circuits have been simulated by HSPICE simulation program with TSMC 0.35um and TSMC 0.18um process parameters, also the proposed circuits have been tape-out. The pre and post layout simulation results are consistent with the theoretical analysis which can be used to prove the feasibility of the proposed circuits. The proposed Mixed-Mode Differential Output Voltage circuit can be applied to different analog integrated circuit applications

摘要...i
Abstract...ii
誌謝...iii
目錄...iv
表目錄...vi
圖目錄...vii
符號說明...x
第一章 緒論...1
1.1積體電路發展沿革...1
1.2研究動機...2
1.3研究方向與重點...2
1.4論文架構簡介...2
1.5設計流程...3
第二章 參考電壓回顧...5
2.1參考電壓介紹...5
2.2參考電壓工作原理...5
2.2.1齊納二極體穩壓電路...6
2.2.2 BJT參考電壓電路...7
2.2.3 MOSFET參考電壓電路...8
2.3弱反轉區(Weak inversion)...10
2.4負溫度係數...11
2.4.1 BJT模組...11
2.4.2 MOSFET模組...12
2.5啟動電路...13
第三章 混合模式差動輸出參考電壓設計...15
3.1第一種混合模式差動輸出參考電壓電路...15
3.1.1第一種混合模式差動輸出參考電壓電路工作原理...16
3.1.2第一種混合模式差動輸出參考電壓電路模擬結果...17
3.1.3第一種混合模式差動輸出參考電壓電路佈局圖...19
3.2第二種混合模式差動輸出參考電壓電路...20
3.2.1第二種混合模式差動輸出參考電壓電路工作原理...20
3.2.2第二種混合模式差動輸出參考電壓電路模擬結果...21
3.2.3第二種混合模式差動輸出參考電壓電路佈局圖...23
3.3第三種混合模式差動輸出參考電壓電路...24
3.3.1第三種混合模式差動輸出參考電壓電路工作原理...24
3.3.2第三種混合模式差動輸出參考電壓電路模擬結果...24
3.3.3第三種混合模式差動輸出參考電壓電路佈局圖...27
3.4第四種混合模式差動輸出參考電壓電路...28
3.4.1第四種混合模式差動輸出參考電壓電路工作原理...28
3.4.2第四種混合模式差動輸出參考電壓電路模擬結果...29
3.4.3第四種混合模式差動輸出參考電壓電路佈局圖...31
3.5 四種電路模擬結果與討論...32
第四章 晶片實作與量測結果...33
4.1全客戶式IC設計流程...33
4.2量測流程與儀器...35
4.3第一種參考電壓電路...36
4.3.1晶片實體...36
4.3.2晶片量測結果...37
4.4第二種參考電壓電路...41
4.4.1晶片實體...41
4.4.2晶片量測結果...42
4.5第三種參考電壓電路...48
4.5.1晶片實體...48
4.5.2晶片量測結果...49
4.6第四種參考電壓電路...55
4.6.1晶片實體...55
4.6.2晶片量測結果...56
第五章 結論與討論...63
參考文獻...64
Extended Abstract...66


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