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研究生:李幸妮
研究生(外文):Hsing-NiLi
論文名稱:應用於多階儲存單元NAND快閃記憶體之GF(4)極化碼
論文名稱(外文):GF(4) Polar Codes for MLC NAND Flash Memories
指導教授:郭致宏郭致宏引用關係
指導教授(外文):Chih-Hung Kuo
學位類別:碩士
校院名稱:國立成功大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2020
畢業學年度:108
語文別:中文
論文頁數:60
中文關鍵詞:多層儲存單元NAND快閃記憶通道極化GF(4)極化碼伽羅瓦體
外文關鍵詞:MLC NAND Flash MemoryChannel PolarizationGF(4)Polar CodesGalois field
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NAND快閃記憶體(Flash Memories)隨著製程的進步,儲存密度(Storage Density)容量越來越高,但同時也使得儲存資料(Storage Data)受雜訊的影響越嚴重。因此,對儲存資料的可靠度需求與日俱增。為了確保資料的可靠性,必須有更強大的錯誤更正碼(Error Correction Code, ECC)輔助。本篇論文研究近期興起的錯誤更正碼-極化碼(Polar codes),基於一個儲存單元能夠儲存兩個位元的NAND快閃記憶體,提出一個新穎的方法,四元素伽羅瓦體(Quaternary Galois field, GF(4))的極化碼應用在多層儲存單元(Multi-level cell, MLC) NAND快閃記憶體。
本論文用四階脈波振幅調變(4-level pulse- amplitude modulation, 4-PAM) 以及可加性高斯白雜訊通道(Additive white Gaussian noise, AWGN)來近似MLC NAND快閃記憶體的模型。本論文根據在4-PAM之下,GF(4)極化碼的表現優於GF(2)極化碼,可推論GF(4)極化碼可使資料的可靠性更有保障。
本論文針對GF(4) 極化碼提供三種解碼方案,分別為連續消除解碼(Successive Cancelation, SC)、連續消除翻轉解碼(Successive Cancelation Flip , SCF)與連續消除條列解碼(Successive Cancelation List, SCL)演算法,以更進一步的改善 GF(4) 極化碼的性能。最後,本論文針對多層儲存單元NAND快閃記憶體通道進行極化碼的建構、極化編碼,並與 GF(2) 極化碼比較,得到GF(4)極化碼的位元錯誤率約有1 dB的改善。
Due to the process of technology scaling down, the storage density of the memories increases progressively. However, the storage data is affected more easily by noise at the same time. That effect results in the data reliability reduced. Hence, adding powerful error correction codes (ECCs) is inevitable. In this work, we study the current ECC, polar codes, which get researchers’ attention. Moreover, we propose a novel idea that is the application of the quaternary Galois field (GF(4)) polar codes to the multi-level cell (MLC) NAND flash memories. Under the mechanism of the MLC NAND flash model,We first observe that the simulation results of the GF(4) polar codes with the 4-level pulse-amplitude modulation (PAM4) are better than the GF(2) at the high signal-to-noise ratio(SNR). Therefore, our proposed method can reduce the bit error rate (BER) and improve the reliability of MLC NAND flash memories.
中文摘要 I
英文延伸摘要 II
致謝 IX
目錄 X
表目錄 XII
圖目錄 XIII
第一章 緒論 1
1-1 前言 1
1-2 研究動機 2
1-3 研究貢獻 3
1-4 論文架構 3
第二章 研究背景 4
2-1 多層儲存單元快閃記憶體(Multi-Level Cell NAND Flash Memory) 4
2-1-1 MLC NAND 快閃記憶體架構 4
2-1-2 基本操作 7
2-2 MLC NAND 快閃記憶體之雜訊成因[14] 8
2-3 二進制極化碼(Binary Polar Codes) 9
2-3-1 通道極化及極化碼之建構 9
2-3-2 連續消除解碼(Successive Cancelation Decoding, SC Decoding) 11
2-3-3 系統化極化碼(Systematic Polar Codes) 13
2-4 非二進制極化碼(Non-Binary Polar Codes) 14
2-4-1 有限場(Finite Field) 14
2-4-2 q進制輸入通道之極化與極化碼之建構 ( q-ary Channel Polarization and Code construction) 15
2-4-3 非二進制極化編碼(Non-Binary Polar Encoding) 16
2-5 文獻回顧 18
2-5-1 二進制極化碼之連續消除名單解碼 18
2-5-2 二進制極化碼之連續消除翻轉解碼 20
2-5-3 串接的極化碼(Concatenated Polar Codes) 22
2-5-4 非二進制之建構極化碼 23
第三章 系統架構與解碼演算法 25
3-1 參數說明 25
3-2 近似快閃記憶體通道模型之系統架構 25
3-3 純軟與量化軟解映射器(Pure- Soft and Quantized-Soft De-mapper) 28
3-3-1 純軟解映射器(Pure-Soft De-mapper) 28
3-3-2 量化軟解映射器(Quantized-Soft De-mapper) 29
3-4 解碼方案 31
3-4-1 GF(4)連續消除解碼(Successive Cancelation Decoding, SC Decoding) 31
3-4-2 GF(4)連續消除翻轉解碼(SC Flip Decoding, SCF Decoding) 35
3-4-3 連續消除條列解碼 (SC List Decoding, SCL Decoding) 38
3-5 MCL NAND快閃記憶體通道模型之GF(4)極化碼系統架構 41
第四章 實驗結果與分析 43
4-1 模擬環境與參數設置 43
4-1-1 GF(4) 極化碼參數設置 43
4-1-2 GF(2)極化碼架構與參數設置 44
4-2 近似通道模型之系統架構模擬結果與分析 45
4-2-1 解碼演算法之模擬結果與分析 45
4-2-2 GF(2)與GF(4)極化碼錯誤率比較與分析 48
4-2-3 非系統化與系統化極化碼之錯誤率比較 50
4-3 MCL NAND快閃記憶體通道模型架構模擬結果 51
4-3-1 模擬結果 51
第五章 結論與未來展望 53
5-1 結論 53
5-2 未來展望 53
Reference 54
附錄 59
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