臺灣博碩士論文加值系統

由於對於網路傳輸效率及品質要求提升，第五代行動通訊網路(5th Generation Mobile Networks)已經成為通訊領域的其中一個鎂光燈，而對於硬體設計，軟體化實體層(soft-PHY)在5G的規格下更能有延展性及擴充性。
然而在Soft-PHY實作的平台下，單純使用CPU及GPU當作系統中的處理器，已經慢慢地無法滿足開發者及使用者的需求，因此為了提高整體GPU平行運算的效率，在開發上除了選擇降低運算的精準度，並且嘗試使用新的GPU圖靈架來取代傳統作法，使得PHY layer能夠有更高的執行效率，因此本篇論文著重於PUSCH在半精度上使用及兩種不同的GPU架構的改良。

Due to the increase in network transmission efficiency and quality requirements, 5th Generation Mobile Networks has become one of the magnesium lights in the communication field. For hardware design, the soft-PHY layer is used in 5G. Under the specifications can be more malleable and expandable.
However, under the platform implemented by Soft-PHY, simply using the CPU and GPU as the processors in the system has gradually failed to meet the needs of developers and users. Therefore, in order to improve the efficiency of the overall GPU parallel computing, In addition to choosing to reduce the accuracy of the calculation, and trying to use the new GPU Turing frame to replace the traditional method, so that the PHY layer can have higher execution efficiency, this paper focuses on the use of PUSCH in half precision and two different Improved GPU architecture.

摘 要 i
誌謝 iii
List of Contents iv
List of Figures vi
一、 INTRODUCTION 1
二、 RELATED WORK 4
2.1 Overview of Soft PHY system 4
2.2 Motivation and problem statement 5
2.3 CUDA 6
2.3.1 Introduction of CUDA 6
2.3.2 CUDA core in GPU 7
2.3.3 Tensor core in GPU 7
2.4 Half-precision floating-point format (FP16) 8
三、 RESEARCH METHOD 10
3.1 Overview of RX flow and LTE PUSCH 10
3.1.1 Flow Description 10
3.1.2 Memory Architecture 11
3.2 Concept of Remove Cyclic Prefix 13
3.2.1 Overview of Cyclic Prefix 13
3.2.2 The Proposed Method 14
3.3 Fast Fourier Transform, FFT 14
3.3.1 Overview of FFT 14
3.3.2 CUDA FFT API 15
3.4 Channel Estimation in CUDA core 15
3.4.1 Overview of Channel Estimation 15
3.4.2 Implementation Channel Estimation in GPU 16
3.4.3 Implementation CFR and Compenstaion in GPU 18
3.4.4 Problem Encountered bteween Compensation and Inverse Fast Fourier Transform, IFFT 20
3.5 Demodulation in CUDA core 20
3.5.1 Flow Description 20
3.5.2 Problem Encountered in Demodulation 21
3.6 Channel Estimation in Tensor core 22
3.6.1 Flow Description 22
3.6.2 Problem Encountered in Tensor core 22
四、 PERFORMANCE MEASUREMENT AND ANALYSIS 24
4.1 Verifying Environment 24
4.2 Comparion from FP32 to FP16 Architecture 24
4.2.1 Remove CP and FFT 24
4.2.2 Channel Estimation 24
4.2.3 Channel Compensation 25
4.2.4 Demodulation 25
4.3 Comparion from Different environment 26
4.3.1 Compare to Tesla T4 and Quadro GV100 26
4.3.2 Compare to Intel I9 and Tesla T4 27
五、 CONCLUSION AND FUTURE WORKS 28
參考文獻 29
附錄一 31
附錄二 32
附錄三 32
附錄四 33
附錄五 34

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