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研究生:李牧維
研究生(外文):Lee, Mu-Wei
論文名稱:使用頻率鎖定邊界傳導模式控制於零電壓切換之基於全氮化鎵交錯無橋功率因數校正轉換器達到99.1%高功率因數與98.9%高效率
論文名稱(外文):Using Frequency-Locked Boundary Conduction Mode to Achieve Zero-voltage Switching in an All GaN-based Interleaved Bridgeless PFC Converter for 99.1% High PF and 98.9% high Efficiency
指導教授:陳科宏陳科宏引用關係
指導教授(外文):Chen, Ke-Horng
口試委員:王清松黃立人陳科宏
口試委員(外文):Wang, Ching-SungHuang, Li-RenChen, Ke-Horng
口試日期:2019-10-23
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電控工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2019
畢業學年度:108
語文別:英文
論文頁數:47
中文關鍵詞:交錯式功率因素校正氮化鎵鎖頻邊界傳導雙斜坡交錯控制導通時間調適零電壓切換最佳化
外文關鍵詞:interleaved power factor correction (PFC)Gallium nitride (GaN)frequency-locked boundary conduction (FLBCM)dual ramp interleaved control (DRIC)dual ramp interleaved control (DRIC)modulating on time (MOT)optimization of zero voltage switching (ZVS)
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隨著雲端運算產業的快速成長對於電力的需求相對日益增加,同樣地工業電源對於綠能電力也逐年提高。特別的是一個高質量的交流電源轉換器不僅提升了功率因數(PF),還提高了電源轉換的效率。除此之外,為了在更小的尺寸中實現更高PF和高效率,傳統的功率開關轉換器被新型態的氮化鎵(GaN)功率高電子遷移率晶體管(HEMT)代替。在本論文中,本文提出了一種基於氮化鎵功率器件和兩相交織控制方法的PFC轉換器原型,以節省傳統CMOS電源開關和其他組件的功耗問題。在一般傳統的PFC升壓轉換器中,因為存儲在MOSFET寄生高輸出電容中的高能量而遭受嚴重硬開關問題,故效率無法有效作提升。除此之外,利用在邊界傳導模式下電感器上所產生的反向電流,以抽出存儲在電源開關寄生電容中的能量。此外,由於氮化鎵電源開關的寄生電容值低,反向電流可以縮到更小以節省傳導損耗。因此,電源開關兩端的電壓為零; 實現了最佳化零電壓開關(ZVS)的優化。
As the demand for electricity from cloud servers continues to increase, green power in industrial power supplies is increasing. In particular, high-quality AC power conversion not only improves power factor (PF) but also increases conversion efficiency. Furthermore, in order to achieve high PF and high efficiency in a compact size design, conventional power switches are replaced by gallium nitride (GaN) power high electron mobility transistors (HEMTs). In this thesis, a prototype of PFC converter based on the GaN power devices and two-phase interleaved control method is proposed to reduce the power loss by the CMOS power switches and the other components. The conventional PFC boost converters suffer from the hard-switching problem with high energy stored in the output capacitors of MOSFET. Besides, the reversed current occurs on the inductor is utilized within boundary conduction mode (BCM) to take out the energy stored in the parasitic capacitance of the power switches. Furthermore, with the low parasitic capacitance of GaN power switch, the reversed current can be scaled down to save conduction loss. Hence, the voltage across the power switch is zero; the optimization of zero voltage switching (ZVS) technology is achieved.
摘 要 i
ABSTRACT ii
誌 謝 iii
Contents iv
Figure Captions vi
Table Captions viii
Chapter 1 Introduction 1
1.1 Background 1
1.2 The basic Concept of PFC Converter 3
1.2.1 Classification of PFC Converter 4
1.3 Design Motivation 6
1.4 Thesis Organization 7
Chapter 2 Basic Definition and Working Principle of PFC Converter 8
2.1 Fundamentals of Bridgeless PFC Boost Converter 8
2.1.1 Control Modes of PFC Boost Converter 9
2.1.2 Principle of bridgless PFC Boost Converter with BCM 10
2.2 Analysis of Power Losses and Conversion Efficiency 15
2.2.1 Conduction Loss 15
2.2.2 Switching Loss 16
2.2.4 Driving Loss 16
2.2.5 Conversion Efficiency Calculation 17
Chapter 3 Proposed Interleaved Control of Frequency-Locked Boundary Conduction Mode for Optimization of Zero Voltage Switching (ZVS) 18
3.1 Gallium nitride (GaN) power high electron mobility transistors (HEMTs) 18
3.2 Proposed Bridgeless PFC Converter 20
3.3 Architecture of proposed true bridgeless interleaved all GaN-based PFC boost converter 21
3.3.1 Zero Voltage Switching BCM Control 23
3.3.2 Frequecny-Locked BCM Control 25
3.3.3 Dual Ramp Inerleaved Control 26
3.3.4 Modulating On Time 26
Chapter 4 Circuit Implementations 28
4.1 Frequecny-Locked BCM Control 28
4.2 Dual Ramp Inerleaved Control 31
4.3 Modulating On Time 32
Chapter 5 Simulation Results 34
5.1 Simulation Results without Proposed Mechanism 34
5.2 Simulation Results with Proposed Mechanism 35
5.3 Statstic Results 41
5.4 Comparisons of other AC/DC system methodologies 42
Chapter 6 Conclusion and Future Work 44
6.1 Conclusion 44
6.2 Future Work 44
Reference 45
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