(3.220.231.235) 您好!臺灣時間:2021/03/08 06:00
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果

詳目顯示:::

我願授權國圖
: 
twitterline
研究生:王威喬
研究生(外文):WANG, WEI-CHIAO
論文名稱:電源分布系統雜訊機制及最佳化研究
論文名稱(外文):Research on Noise Distribution of Power Distribution System and Optimization Design
指導教授:吳松茂
指導教授(外文):WU, SUNG-MAO
口試委員:林漢年王陳肇吳松茂
口試委員(外文):LIN, HAN-NIENWANG, CHEN-CHAOWU, SUNG-MAO
口試日期:2020-07-28
學位類別:碩士
校院名稱:國立高雄大學
系所名稱:電機工程學系碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2020
畢業學年度:108
語文別:中文
論文頁數:96
中文關鍵詞:電源分布網路雜訊近場量測系統回流路徑雜訊抑制方法最佳化設計
外文關鍵詞:Noise on Power Distribution NetworkNear Field MeasurementReturn Current PathNoise Suppression MethodDesign Optimization  
相關次數:
  • 被引用被引用:0
  • 點閱點閱:21
  • 評分評分:系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
中文摘要 i
英文摘要 ii
致謝 iii
目錄 iv
圖目錄 vi
表目錄 xi
第一章 緒論 1
1.1研究動機 1
1.2文獻回顧與探討 4
1.2.1接地彈跳雜訊 4
1.2.2雜訊抑制對策 7
1.2.2近場量測系統發展 12
1.3章節介紹 17
第二章 電源分布系統雜訊傳導機制研究 18
2.1電源雜訊傳導干擾效應 18
2.2固定雜訊源樣品設計 20
2.2.1量測結果與干擾頻段分析 23
2.2.2模擬準確度驗證與分析 27
2.3未知雜訊源封裝型態樣品設計 30
2.3.1量測結果與干擾頻段分析 31
2.3.2模擬準確度驗證 32
第三章 近場量測應用於電源雜訊傳導機制研究 34
3.1近場頻域量測架構 36
3.1.1固定雜訊源樣品頻域近場量測結果 38
3.1.2未知雜訊源封裝型態樣品頻域近場量測結果 42
3.2近場時域量測架構 46
3.2.1固定雜訊源樣品近場時域量測結果 47
3.2.1未知雜訊源封裝型態樣品近場時域量測結果 48
3.3近場模擬準確度驗證 49
第四章 電源雜訊抑制最佳化 53
4.1電磁能隙設計參數 53
4.2針對雜訊源電磁能隙雜訊抑制 58
4.3近場熱點電磁能隙抑制 63
4.4未知雜訊源電磁能隙位置最佳化 70
第五章 結論與未來展望 79
參考文獻 81

[1]張存續,”高速數位電路之電源完整性”,2003
[2]Frane Jian, "PI Basic–Simultaneous Switching Noise (SSN)", 2016
[3]Ivan Ndip, Florian Ohnimus, Kai Löbbicke, Micha Bierwirth, Christian Tschoban, Stephan Guttowski and Herbert Reichl, "Modeling, Quantification, and Reduction of the Impact of Uncontrolled Return Currents of Vias Transiting Multilayered Packages and Boards," IEEE Transactions on Electromagnetic Compatibility, vol. 52, no. 2, May 2010
[4]鍾明峰,”以傳輸線模型分析高速數位構裝之電源完整性”,國立中山大學電機工程研究所碩士論文,民國九十五年六月。
[5]吳瑞北,” GHz 連線系統電源整合度模型化與設計(3/3)”,行政院國家科學委員會專題研究計畫成果報告,民國九十七年九月。
[6]Wataru Ichimura, Sho Kiyoshige, and Toshio Sudo, "EMI reduction by suppressing Q factor of total PDN with variable on-die capacitance and resistance," 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems, Oct 2014
[7]IEC 61967-3, Integrated Circuits-Measurement of Electromagnetic Emissions, 150kHz to 1GHz- part3 “Measurement of Radiated Emissions-Surface Scan Method”, 2005
[8]IEC 61967-6, Integrated Circuits-Measurement of Electromagnetic Emissions, 150kHz to 1GHz- part6 “Measurement of Conducted Emissions-Magnetic Probe Method”, 2002
[9]“Products ESD Probes”, Amber Precision Instruments
[10]A. Boyer, S. Bendhia and E. Sicard, "Characterisation of electromagnetic susceptibility of integrated circuits using near-field scan," Electronics Letters, vol. 73, Issue. 1, Jan 2007
[11]陳泊佑,”近場量測技術應用於系統最佳化設計分析之研究,” 國立高雄大學電機工程學系碩士班碩士論文, 民國一百零六年
[12]Bogation, E., “Signal Integrity—Simplified,” Prentice Hall, 2004.
[13]Intel, “10 nm is based upon current expectations and available information”, Mar 2017
[14]Jonghyun Cho, Youngwoo Kim, and Joungho Kim, "Analysis of glass interposer PDN and proposal of PDN resonance suppression methods," 2013 IEEE International 3D Systems Integration Conference (3DIC), Oct 2013
[15]Bogation, E., “Signal Integrity—Simplified,” Prentice Hall, 2004.
[16]J Bobae Kim and Dong Wook Kim, "Improvement of Simultaneous Switching Noise Suppression of Power Plane using Localized Spiral-Shaped EBG Structure and λ/4 Open Stubs," 2007 Asia-Pacific Microwave Conference, Dec 2007
[17]Shuhua Wen, Jinling Zhang and Yinghua Lu, "Modeling and Quantification for Electromagnetic Radiation of Power-Bus Structure With Multilayer Printed Circuit Board," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 6, Issue. 1, Jan 2016
[18]Hsin Chan Hsieh, Hao Wei Chan, Yu Cong Wang, Ying Hsi Lin, Wen Shan Wang, Shih Hung Wang, and Ruey Beei Wu, "Non-Periodic Flipped EBG for Dual-Band SSN Mitigation in Two-Layer PCB," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 9, Issue. 9, Sept 2019
[19]Ivan Ndip, Kai Löbbicke, Christian Tschoban, Christian Ranzinger, Karim Richlowski, Andreas Contag, Herbert Reichl, Klaus Dieter Lang and Heino Henke, "On the Optimization of the Return Current Paths of Signal Vias in High-Speed Interposers and PCBs using the M3-Approach," 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC), Aug 2014
[20]Xiao-Xiao Wang and Dong-Lin Su, "The Influence of Power/Ground Resonance to Via's SSN Noise Coupling in Multilayer Package and Three Mitigating Ways," 2006 International Conference on Electronic Materials and Packaging, Dec 2006
[21]Jian Pan, Yu-Shan Li1, Jian-Min Lu1, Xiang-Yang Liu and Wen-Jing Zhao, "Wideband Simultaneous Switching Noise Isolation in Power/Ground Cavity Structure with Complementary Split Ring Resonators," 2014 7th International Conference on Intelligent Computation Technology and Automation, Oct 2014
[22]謝昕峯,”基於近場量測技術之晶片層級電磁干擾研究”,國立中山大學電機工程研究所碩士論文,民國一百零一年七月。
[23]杜孟樺,”近場量測技術應用於構裝電路之差動串音干擾與訊號不連續測試研究”,國立高雄大學電機工程學系研究所碩士論文,民國一百零五年七月。
[24]許仁芳,”系統構裝電磁輻射干擾抑制與模型化研究,” 國立高雄大學電機工程學系碩士班碩士論文, 民國一百零三年.

電子全文 電子全文(網際網路公開日期:20250810)
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
系統版面圖檔 系統版面圖檔