|
參考文獻 中文部分 翁紹仁、Savory, P.。系統模擬與Simul8教戰手冊。高雄市:阜盛文教。 英文部分 1.Arturo, M. & Meyuhas, A.,(2016) Fab labor productivity improvement through a combined modeling approach. 2016 International Symposium on Semiconductor Manufacturing (pp.1-5). Tokyo 2.Balle, F. & Balle, M. (2006). Feel the force of flexible manpower. Manufacturing Engineer., 84(6), 20-25. 3.Bergmann, S., Feldkamp, N., & Strassburger, S. (2015). Approximation of dispatching rules for manufacturing simulation using data mining methods. 2015 Winter Simulation Conference (pp.2329-2340.), Huntington Beach, CA. 4.Chen, H. Z., Liu, C., Rong, Y., & Zhu, J. (2012). Research on dynamic dispatching rule for semiconductor assembly production line. 2012 IEEE International Conference on Industrial Engineering and Engineering Management (pp.493-497). Hong Kong. 5.Cheong, W. K., Look, S. O., & Mohamed, H. (2007). Improving direct labour productivity through minimizing time wastage approach. 2007 International Symposium on Semiconductor Manufacturing (pp.1-4). Santa Clara, CA. 6.Cho, K. H., Chung, Y. H., Choung, Y. I., Park, S. C., & Kim, B. H. (2017). Two boundary based dispatching rule for on-time delivery and throughput of wafer fabs with dedication constraints. 2017 Winter Simulation Conference (pp.3555-3564). Las Vegas, NV. 7.Chung, Y. H., Kim, B. H., Seo, J. C. (2015) Reservation Based Dispatching Rule for Wafer Fab with Engineering Lots. 2015 Proceedings of the 2015 Winter Simulation Conference (pp.2974-2982). Huntington Beach, California. 8.Concannon, K., Elder, M., Hindle, K., Tremble, J., Tse, S. (2007) Simulation Modeling with Simul8. Visual Thinking Int. Canada. 9.Cui, M. & Li, L. (2018). A closed loop dynamic scheduling method based on load balancing for semiconductor wafer fabrication facility. 2018 IEEE International Conference on Smart Manufacturing, Industrial & Logistics Engineering (SMILE) (pp.1-6). Hsinchu. 10.Dequeant, K., Vialletelle, P., Lemaire, P., & Espinouse, M. L., (2016, December). A literature review on variability in semiconductor manufacturing: The next forward leap to industry 4.0. 2016 Winter Simulation Conference (pp.2598-2609). Washington, DC. 11.Jaret W. H., Kerrie, N. (2002) Learning SIMUL8: The Complete Guide. Plain Vu Publishers 12.Kerk, E., Chan, C. M., (2018) Queue Time Reduction in Wafer Fab Process through Six Sigma Approach. 2018 e-Manufacturing & Design Collaboration Symposium (eMDC) (pp.1-4), Hsinchu 13.Li, L., Qiao, F., Jiang, H., & Wu, Q. (2004). The research on dispatching rule for improving on-time delivery for semiconductor wafer fab. ICARCV 2004 8th Control, Automation, Robotics and Vision Conference Vol. 1. (pp.494-498). Kunming, China. 14.Liu, C., M., Kuo, C., J., Chi, C., Y. (2006). A Dynamic Method for Optimal WIP Allocation and Control in a Semiconductor Manufacturing System. IEEE International Symposium on Semiconductor Manufacturing Conference Proveedings. (pp.61-65). 15.Park, S. C., Kim, B. H., Ahn, E., Chung, Y., & Yang, K. (2013). Fab simulation with recipe arrangement of tools. 2013 Winter Simulation Conference (pp.3840-3849). Washington, DC. 16.Yoon, S., & Jeong, S. (2018). Line balancing strategy for re-entrant manufacturing. IEEE Transaction on Semiconductor Manufacturing,31(1), 42-51.
|