無線通訊的領域中，功率放大器的特性好壞會影響到整體系統。現今的無線通訊系統大多講求高頻譜利用率，對於線性度有一定要求，然而對功率放大器來說，效率和線性度是相互牴觸，需要使用線性化技術來改善此問題。異相調變(Outphasing modulation)或稱作非線性元件進行線性放大(LINC)技術可同時達到高線性度和效率的要求，主要是將輸入訊號分解成兩路振幅相同的異相訊號，在各自經由非線性高效率的功率放大器進行放大，最後由功率合成器合成兩路訊號，即可得到理想上無失真放大訊號。
LINC系統中的功率合成器主要可以分為兩大類，分別為有損型功率合成器及無損型功率合成器，有損型功率合成器本身具有良好的隔離度，且輸入阻抗容易匹配，因此線性度比無損型功率合成器高，本論文提出了使用變壓器進行實體化的有損型功率合成器，藉由在兩路訊號間加入隔離阻抗，確保各端點的輸入阻抗在任何角度下都能維持一致，並採用90奈米互補式金屬氧化物半導體(CMOS)製程，憑藉著其易於整合之特性可將8字型輸入平衡不平衡轉換器、功率電晶體及提出的功率結合變壓器整合在一起。CMOS LINC功率放大器的晶片面積為1.166 mm2。當操作在2.3 GHz的情況下，最大輸出功率為20.44 dBm，此時最大的汲極效率(DE)為21.03 %，功率附加效率(PAE)為15.764%。使用長期演進技術(LTE) 16-QAM 20-MHz頻寬的測試訊號搭配脈衝調變技術進行調變，且符合LTE鄰近通道洩漏功率比(ACLR)和頻譜遮罩的情況下，平均輸出功率為15.52 dBm，並且可將汲極效率從4.81%在α =1提升至8.66%在α =0.3的情況下。

In the wireless communication field, the characteristic of the power amplifier (PA) will influence the overall system. Most of the modern wireless communication system focus on the high spectrum utilization, which means the linearity requirement is tight. However, there has to be a trade-off between the efficiency and the linearity in PAs. Therefore, the linearization techniques have been widely used to solve this problem. The outphasing modulation, or called the linear amplification with nonlinear components (LINC) technique, can meet the requirements of high linearity and high efficiency at the same time. This technique divides the input nonconstant-envelope signal into two constant-envelope outphasing signals. The two signals were amplified by their respective PAs and then combined by using the output power combiner. Consequently, the linear amplification of the input signal can be obtained.
The commonly used power combiners in LINC systems can be roughly divided into two types. One is lossy combiner, and the other is lossless combiner. The lossy power combiner has a great characteristic of isolation and matching. Hence, this combiner has better linearity than lossless combiner. The novel isolated power combiner implemented by the transformer is proposed in this thesis. By adding the isolation impedance between two branch signals, the differential impedance will be maintained at any angle. The proposed PA is realized in the 90-nm complementary metal-oxide semiconductor (CMOS) process, which has a good integration characteristic including the 8-shape input baluns, power transistors, and the proposed isolated power-combining transformer. The chip area of the CMOS LINC PA is 1.166 mm2. The PA achieves 20.44 dBm maximum output power with a peak drain efficiency (DE) and power-added efficiency (PAE) of 21.03% and 15.764% respectively at 2.3 GHz. Using a 20-MHz bandwidth Long Term Evolution (LTE) 16-QAM test signal under pulse-LINC modulation, the average output power is 15.52 dBm, and the drain efficiency can be increased from 4.81% at α =1 to 8.66% at α =0.3 while meeting the LTE adjacent channel leakage power ratio (ACLR) and spectrum mask.

摘要 i
ABSTRACT ii
誌謝 iv
Contents v
List of Figures vii
List of Tables xii
Chapter 1　Introduction 1
1.1 Background 1
1.1.1 Pre-distortion technique 1
1.1.2 EER technique 2
1.1.3 LINC technique 3
1.2 Thesis Contribution and Overview 3
Chapter 2　LINC Transmitter 5
2.1 Theory and Analysis of the LINC Transmitter 5
2.2 Efficiency of the LINC Transmitter 7
2.3 Output Combiners in LINC Systems 8
2.3.1 Lossy Power Combiner 8
2.3.2 Lossless Power Combiner 9
2.4 Efficiency Enhancement techniques of LINC 11
2.4.1 Multi-level LINC 11
2.4.2 Mode-multiplexing LINC 13
2.4.3 Power Recycling Architecture 14
Chapter 3　Power Combining Transformers 16
3.1 Stacked PAs 16
3.2 Magnetically Coupled Transformers 17
3.2.1 Series-combining Transformers 19
3.2.2 Parallel-combining Transformers 21
3.3 Concentric Vortical Transformer 24
3.4 Survey of the LINC PAs in CMOS process 34
Chapter 4　CMOS LINC PA Architecture 41
4.1 Circuit Architecture 41
4.1.1 Analysis of the Output Combining transformer 41
4.1.2 Design of the Compact CMOS LINC PA 45
4.2 EM simulation of the Input Balun and CS-CVT 47
4.2.1 Input Balun 47
4.2.2 CS-CVT 55
4.3 Implementation 60
4.4 Pulsed LINC System 61
4.5 Measurement Results 63
Chapter 5　Conclusion 73
Reference 75

[1] P. Varahram, S. S. Jamuar, S. Mohammady, and M. N. Hamidon, “Power amplifiers linearization based on digital predistortion with memory effects used in CDMA applications,” in Proc. European Conf. on Circuit Theory and Design (ECCTD), Aug. 2007, pp. 488–491.
[2] D. Morgan, Z. Ma, J. Kim, M. Zierdt, and J. Pastalan, “A generalized memory polynomial model for digital predistortion of RF power amplifiers,” IEEE Trans. Signal Process., vol. 54, pp. 3852–3860, Oct. 2006.
[3] D. Milosevic, J. van der Tang, and A. van Roermund, “Intermodulation products in the EER technique applied to Class-E amplifiers,” in Int. Circuits Syst. Symp. Dig., Vancouver, BC, Canada, May 2004, vol. I, pp. 637–640.
[4] I. Kim, Y. Woo, J. Kim, J. Moon, J. Kim, and B. Kim, “High-efficiency hybrid EER transmitter using optimized power amplifier,” IEEE Trans. Microw. Theory Techn., vol. 56, no. 11, pp. 2582–2593, Nov. 2008.
[5] I. Hakala, D. K. Choi, L. Gharavi, N. Kajakine, J. Koskela, and R. Kaunisto, “A 2.14-GHz Chireix outphasing transmitter,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 6, pp. 2129–2138, Jun. 2005.
[6] J. Gründlingh, K. Parker, and G. Rabjohn, “A high efficiency Chireix outphasing power amplifier for 5 GHz WLAN applications,” in Proc. IEEE MTT-S Int. Microw. Symp., Fort Worth, TX, Jun. 2004, pp. 1535–1538.
[7] S. Moloudi, K. Takinami, M. Yousself, M. Mikhemar, and A. Abidi, “An outphasing power amplifier for a Software-defined radio transmitter,” in Proc. ISSCC Dig. Techn. Papers, Feb. 2008, pp. 568–569.
[8] L. R. Kahn, “Single-sideband transmission by envelope elimination and restoration,” Proc. IRE, vol. 40, no. 7, pp. 803–806, Jul. 1952.
[9] H. Chireix, “High power outphasing modulation,” Proc. IRE, vol. 23, no. 11, pp. 1370–1392, Nov. 1935.
[10] D. C. Cox, “Linear amplification with nonlinear components,” IEEE Trans. Commun., vol. COM-22, no. 12, pp. 1942–1945, Dec. 1974.
[11] K. Y. Jheng, Y. J. Chen, and A. Y. Wu, “Multilevel LINC system designs for power efficiency enhancement of transmitters,” IEEE J. Sel. Top. Signal Process, vol. 3, no. 3, pp. 523–532, Jun. 2009.
[12] A. Birafane and A. Kouki, “On the linearity and efficiency of outphasing microwave amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 52, no. 7, pp. 1702–1708, Jul. 2004.
[13] Ahmed Birafame and Ammar B. Kouki., “Phase-only predistortion for LINC amplifiers with Chireix-outphasing combiners,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 6, pp. 2240–2250, Jun. 2005.
[14] M. Helaoui et al., “A new mode-multiplexing LINC architecture to boost the efficiency of WiMAX up-link transmitters,” IEEE Trans. Microw. Theory Techn., vol. 55, no. 2, pp. 248–253, Feb. 2007.
[15] M. Helaoui and F. M. Ghannouchi, “Linearization of power amplifiers using the reverse MM-LINC technique,” IEEE Trans. Circuits Syst. II, vol. 57, no. 1, pp. 6–10, Jan. 2010.
[16] R. Langridge, T. Thornton, P. M. Asbeck, and L. E. Larson, “A power Re-use technique for improved efficiency of outphasing microwave power amplifiers,” IEEE Trans. Microwave Theory Technol., vol. 47, pp. 1467–1470, Aug. 1999.
[17] S. Pornpromlikit et al., “A watt-level stacked-FET linear power amplifier in Silicon-on-insulator CMOS,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 1, pp. 57–64, Jan. 2010.
[18] U. Kim and Y. Kwon, “A high-efficiency SOI CMOS stacked-FET power amplifier using phase-based linearization,” IEEE Microw. Wireless Compon. Lett., vol. 24, no. 12, pp. 875–877, Dec. 2014.
[19] E. Kaymaksut, B. Francois, and P. Reynaert, “Analysis and design of series combining transformers for integrated Doherty power amplifiers,” in Proc. 2010 Asia-Pacific Microwave Conf. (APMC), pp. 1621–1624.
[20] P. Haldi et al., “A 5.8 GHz 1 V linear power amplifier using a novel on-chip transformer power combiner in standard 90 nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1054–1063, May 2008.
[21] J. Kim et al., “A linear multi-mode CMOS power amplifier with discrete resizing and concurrent power combining structure,” IEEE J. Solid-State Circuits, vol. 46, no. 5, pp.1034 -1048, May 2011.
[22] K. H. An et al., “A 2.4 GHz fully integrated linear CMOS power amplifier with discrete power control,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 7, pp.479–481, July 2009.
[23] I. Aoki, S. D. Kee, D. Rutledge, and A. Hajimiri, “Distributed active transformer: a new power combining and impedance transformation techniques,” IEEE Trans. Microw. Theory Techn., vol. 50, no. 1, pp. 316–32, Jan. 2002.
[24] K. H. An et al., “Power-combining transformer techniques for fully-integrated CMOS power amplifiers,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1064–1075, May 2008.
[25] H.-S. Yang, J.-H. Chen, and Y.-J. E. Chen, “A wideband and highly symmetric multi-port parallel combining transformer technology,” IEEE Trans. Microw. Theory Tech., vol. 63, no. 11, pp. 3671–3680, Nov. 2015.
[26] S. Lee and S. Nam, “A CMOS outphasing power amplifier with integrated single-ended Chireix combiner,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 6, pp. 411–415, Jun. 2010.
[27] H. Xu, Y. Palaskas et al., “A Flip-chip-packaged 25.3 dBm Class-D outphasing power amplifier in 32 nm CMOS for WLAN application,” IEEE J. Solid-State Circuits, vol. 46, no. 7, pp. 1596–1605, Jul. 2011.
[28] J. Fritzin and A. Alvandpour, “A wideband fully integrated +30 dBm Class-D outphasing RF PA in 65 nm CMOS,” IEEE International Symposium on Integrated Circuits, Nov. 2011 pp 25–28.
[29] P. Landin et al., “Modeling and digital predistortion of Class-D outphasing RF power amplifiers,” IEEE Trans. Microw. Theory Tech, vol. 60, no. 6, pp. 1907–1915, Feb. 2012.
[30] H. Lee, S. Jang, and S Hong, “A hybrid polar LINC cmos power amplifier with transmission line transformer combiner,” IEEE Trans. Microw. Theory Techn., vol. 61 no. 3 pp. 1261–1271, Mar. 2013.
[31] M. Gursoy, S. Jahn, B. Deutschmann, and G. Pelz, “Methodology to predict EME effects in CAN bus systems using VHDL-AMS,” IEEE Trans. Electromagn. Compat., vol. 50, no. 4, pp. 993–1002, Nov. 2008.
[32] H.-S. Yang, J.-H. Chen, and Y.-J. Chen, “A 1.2-V 90-nm fully integrated compact CMOS linear power amplifier using the coupled L-shape concentric vortical transformer,” IEEE Trans. Microw. Theory Techn., vol. 62, no. 11, pp. 2689–2699, Nov. 2014.
[33] H.-S. Yang, “Highly-efficient multi-band CMOS power amplifier for mobile phone applications,” Ph. D Dissertation, Graduate Institude of Electronics Engineering College of Electrical Engineering & Computer Science, National Taiwan University, Taipei, 2014 .
[34] J.-H. Chen, “An efficiency-improved outphasing power amplifier using RF pulse modulation,’’ IEEE Microw. Wireless Components Letters, vol. 20, no. 12, pp. 684–686, Dec. 2010.
[35]“User equipment (UE) radio transmission and reception (Release 8)’’ 2010, 3GPP, Valbonne, France, Tech. Spec., TS 36.101 v8.3.0.