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研究生:胡斯涵
研究生(外文):Hu, Szu-Han
論文名稱:仿人類突觸之可堆疊式交叉型電阻式記憶體研究
論文名稱(外文):Stacked Three-dimensional Crossbar Resistive Random Access Memory based Synapse for Neuromorphic Computation System
指導教授:王永和王永和引用關係
指導教授(外文):Wang, Yeong-Her
口試委員:盧達生洪茂峰張御琦張鼎張
口試委員(外文):Lu, Darsen D.Houng, Mau PhonChang, Yu ChiChang, Ting Chang
口試日期:2021-07-16
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2021
畢業學年度:109
語文別:英文
論文頁數:91
中文關鍵詞:電阻式記憶體三維結構可推疊式電子突觸突觸可塑性圖型辨識模擬
外文關鍵詞:RRAMThree-dimensional structureElectrical synapse deviceSynaptic plasticityPattern recognition simulation
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人工智能(AI)、物聯網(IOT)和第五代移動網絡(5G)等已成為各研究機構和企業的技術發展中心。在類神經系統中,開發高密度、操作時間短、非揮發性及低耗能之仿人腦突觸元件是最重要的課題之一。電阻式記憶體 (RRAM) 已被許多學術及業界研究成果證明其具有仿人腦突觸之能力,同時為增加元件密度、降低成本,發展三維結構是勢在必行。然而關於三維結構電阻式記憶體於類神經系統應用的文獻並不多。因此,本研究開發了一具有三維結構並以氧化鉿作為阻值轉換層之電阻式記憶體,該記憶體表現出作為仿人腦突觸元件的高可行性。除了成功透過輸入特定的脈衝波型來達成高線性和對稱的電導值調變,來實現突觸可塑性(synaptic plasticity),上下兩層元件的非線性度表現相當優秀,分別為0.13及0.09。同時,透過一系列單一元件的反覆操作(cycle-to-cycle uniformity)以及元件間的電性比較(device-to-device uniformity)來驗證其可靠性。最後,在圖形辨識模擬平台中,本研究之可推疊式交叉型電阻式記憶體的上下層元件分別達到96.7%及95.3%的高辨識精準度。
相較於其他文獻,本研究的可推疊式交叉型電阻式記憶體除了具有拓展成高元件密度陣列的優勢,同時表現出相當優秀的仿突觸特性,增加未來能應用於類神經系統的可行性。
Emerging technologies such as, Artificial Intelligence (AI), Internet of Things (IOT) and 5th generation mobile networks (5G), have become the center of development for research institutes and industries on fire. The development of a high-density, short-operation-time, non-volatile and low-power-consumption electronic synapse devices is one of the most essential issues for Neuromorphic computation system.
Many research groups have demonstrated that Resistive Random Access Memory (RRAM) has a good potential as an electronic synapse device. In order to improve the integration density of storage systems, RRAMs based on 3D structures have been the mainstream. However, there are few papers about 3D RRAMs applied in neuromorphic systems. In this study, we develop HfO2-based RRAM devices with a three-dimensional structure that exhibit high feasibility as electronic synapse devices for neuromorphic computation systems. With the specific voltage pulse waveforms, high linear and symmetrical Potentiation/ Depression characteristics with Nonlinearity (NL) of 0.13 and 0.09 were achieved. The reliability was demonstrated using various cycle-to-cycle Fast IV measurements and device-to-device DC measurements. Finally, the high accuracy of 96.7% and 95.3% for pattern recognition simulations were achieved with the synaptic characteristics of the 3D crossbar RRAMs of layer 1 and 2 proposed in this study.
The 3D crossbar RRAM proposed in the study not only exhibited superiority of expanding into a high device density array in the future but also exhibited outstanding synaptic characteristics verified by high accuracy-pattern recognition simulations.
摘要 I
Abstract III
誌謝 V
Contents VIII
List of Figures XII
List of Table XVIII
Chapter 1 Introduction 1
1.1 Background 1
1.2 Motivation 2
1.3 Organization of the Thesis 5
Chapter 2 Literature Survey 7
2.1 Resistive Random Access Memory 7
2.1.1 Fundamental definitions 7
2.1.2 Resistive switching mechanism 9
2.1.3 Conduction mechanism 11
2.1.3.1 Ohmic conduction 11
2.1.3.2 Schottky emission 12
2.2 Computational memory 14
2.2.1 Background 14
2.2.2 Electronic synapse devices 14
2.2.3 RRAM-based electronic synapse devices 17
2.3 Three-Dimensional (3D) Resistive RAM 20
Chapter 3 Experiment 23
3.1 Fabrication Equipment 23
3.1.1 Spin Coater 23
3.1.2 Oven 23
3.1.3 Mask Aligner 24
3.1.4 Radio Frequency Sputtering (RF Sputtering) 25
3.1.5 Electron Beam Evaporator 26
3.1.6 Atomic Layer Deposition system (ALD) 27
3.1.7 Reactive Ion Etching system (RIE system) 28
3.2 Material Analysis Equipment 29
3.2.1 Alpha-Step Profilometer 29
3.2.2 Focused Ion Beam System (FIB System) 30
3.2.3 Transmission Electron Microscope (TEM) 30
3.2.4 Energy-Dispersive X-ray Spectroscopy 32
3.3 Electrical Analysis Equipment 33
3.3.1 Agilent B1500A 33
3.4 Device Structure 34
3.5 Photomask Layout Design 35
3.5.1 Photomask design 35
3.5.2 Pattern design 36
3.6 Fabrication Process 39
3.6.1 Substrate cleaning 39
3.6.2 Bottom electrode 40
3.6.2.1 Lithography 40
3.6.2.2 RF sputtering 41
3.6.2.3 Lift-off 42
3.6.3 Isolation layer 43
3.6.4 Via Hole 43
3.6.4.1 Lithography 43
3.6.4.2 RIE etching 44
3.6.5 Resistive switching layer 45
3.6.6 Top electrode 45
3.6.6.1 Lithography 45
3.6.6.2 RF sputtering 46
3.6.6.3 Lift-off 47
3.6.7 Separation layer 47
3.6.8 Electrode pads etching 48
3.6.8.1 Lithography I 49
3.6.8.2 RIE etching I 49
3.6.8.3 Lithography II 50
3.6.8.4 RIE etching II 50
Chapter 4 Results and Discussion 52
4.1 Physical Properties 52
4.1.1 TEM image of Device Cross-section 52
4.1.2 Energy Dispersive Spectroscopy of Elements Analysis 53
4.2 Electrical Properties 55
4.2.1 DC IV Characteristics 55
4.2.2 Conduction mechanism 57
4.2.3 Endurance 60
4.2.4 Cumulative Probability 62
4.2.5 Device-to-device uniformity 64
4.2.6 Synaptic Characteristics 66
4.2.7 Comparison 72
4.2.8 Pattern recognition simulation 74
Chapter 5 Conclusion 78
Chapter 6 Future Works 79
References 81
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