臺灣博碩士論文加值系統

本論文晶片皆採用TSMC CMOS 90-nm製程實現，電路設計皆使用Agilent ADS及全波電磁模擬軟體輔助模擬，量測部分皆以on-wafer的方式進行量測。論文第一部份為設計X-band寬頻可變增益放大器。採用Modified Cherry-Hooper差動放大器架構，利用回授設計達到展延主極點的效果，使電路更為寬頻，增益控制的部分藉由改變回授電晶體的偏壓使等效阻抗值改變，達到增益可變之效果，輸入及輸出皆採用轉阻放大器作為匹配之用途。
論文第二部分為設計使用90奈米CMOS之94-GHz 變壓器結合之二路功率放大器。設計一個利用傳輸線等效變壓器實現功率結合及阻抗級間匹配，傳輸線等效變壓器做功率結合相較於傳統被動電路可以有效減少面積使用且有較小之插入損耗，匹配亦使用變壓器高阻抗轉換率之特性完成，電路中也皆有使用中和技術去提升穩定度以及功率增益之表現。
論文第三部份主要為研製應用於90-100 GHz CMOS毫米波非對稱式混頻器雙向射頻收發機之結合射頻發射開關射頻收發前端電路，本雙向射頻前端收發機電路包含功率放大器、低雜訊放大器、非對稱式雙向混頻器和兩個射頻開關。功率放大器及低雜訊放大器皆採用共源極與共閘極形成疊接式架構，其具有承受較大之供應電壓、較好的增益及輸入與輸出級之間的隔離度等特性；混頻器採用雙平衡非對稱式混頻器架構，一樣能維持單混頻器升降頻之功能；射頻收發開關採用行進波概念設計，利用行進波開關的特性並搭配基極浮接與負基極偏壓技術，達到寬頻響應、高隔離度及改善插入損耗之特性。

This thesis presents the design of 94-GHz CMOS millimeter-wave (MMW) two-way power amplifier (PA), the CMOS millimeter-wave integrated RF transceiver and X-band variable gain amplifier (VGA). The CMOS process is the standard TSMC 90-nm GUTM technology. The first part is to design of a X-band wideband variable gain amplifier. The VGA adopts a modified Cherry-Hooper differential amplifier topology to provide wideband operation. To make the gain of the amplifier tunable, these feedback resistors are replaced by variable resistors realized by biasing the PMOS transistors in the triode region. The second part is to design of a 94-GHz CMOS two-way power amplifier using transformer (TF)-based power combining. The transformer power combiner is designed for consideration of PA output power, matching network and isolation. The TFs in the matching network can support the PA to transfer a certain impedance to the desired impedance. The TFs in the differential PA are for the convenisece of providing DC supply. The third part is to design of a 90-100 GHz CMOS millimeter-wave integrated RF transceiver front-end. The transceiver front-end consists of a power amplifier, a low-noise amplifier (LNA), a bidirectional asymmetric up/down conversion mixer, a transmit-receive (T/R) switch and a modified transmit-receiver switch. The T/R switch adopts two three-stage traveling wave structures with quarter-wavelength transmission lines and negative body-biasing technology. The bidirectional mixer is the asymmetric double-balanced bidirectional mixer. The mixing stage consists of four FETs allocated in a switch quad shared between the Tx and Rx paths. The PA consists of four cascode driver stages and one cascode power stage for the performance of the power gain, 3-dB gain bandwidth and gain flatness. The LNA features a five-stage cascode structure in cascade to amplify the input small RF signal. The chip measurement is performed in a MMW on-wafe probe system.

第一章 緒論 1
1.1 研究動機與背景 1
1.2 文獻回顧 3
1.3 論文架構 4
第二章 X-band CMOS寬頻可變增益放大器 5
2.1 研究動機與背景 5
2.2 可變增益放大器電路設計與量測 7
2.2.1 可變增益機制架構 7
2.2.2 轉阻放大器 10
2.2.3 Cherry-Hooper放大器 11
2.2.4 電路設計說明與考量 15
2.2.5 模擬與量測結果 21
2.3 結果與討論 25
第三章 94-GHz CMOS變壓器結合之二路功率放大器 27
3.1 研究動機與背景 27
3.2 功率放大器電路設計與量測 28
3.2.1 功率結合器架構 29
3.2.2 變壓器模型 31
3.2.3 變壓器匹配 33
3.2.4 變壓器結合類型 34
3.2.5 中和技術 36
3.2.6 電路設計說明與考量 37
3.2.7 模擬與量測結果 43
3.3 結果與討論 47
第四章 90-100 GHz CMOS毫米波整合射頻收發機晶片 49
4.1 研究動機與背景 49
4.2 毫米波整合射頻收發機晶片 51
4.2.1 功率放大器 51
4.2.2 低雜訊放大器 52
4.2.3 混頻器 53
4.2.4 射頻收發開關 54
4.2.5 改良式射頻收發開關 55
4.2.6 模擬與量測結果 56
4.3 結果與討論 72
第五章 結論 75
參考文獻 77

[1]K. Chang, RF and Microwave Wireless Systems, John Wiley, 2000.
[2]T. S. Rappaport, J. N. Murdock, and F. Gutierrez, "State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications," Proceedings of the IEEE, vol. 99, no. 8, pp. 1390-1436, Aug. 2011.
[3]M. Marcus, and B. Pattan, “Millimeter wave propagation: spectrum management implications,” IEEE Microw. Mag., vol. 6, no. 2, pp. 54–62, 2005.
[4]C. Zhu and Z. Duan, "Design of 94-GHz Wideband Waveguide-Feed Patch Antenna and Array in eWLB Package," 2020 50th European Microwave Conference (EuMC), 2021, pp. 824-827.
[5]J. Svedin, L. Huss. A 94 GHz imaging radar system, FOI-R-1191-SE. Feb. 2004.
[6]S. S. M. Chung, C. Wu, Y. Chuang and H. Hsieh, "Preliminary design of 94 GHz E-band phase array antenna for future mobile communication," 2016 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2016, pp. 899-902.
[7]A. Townley et al., "A 94-GHz 4TX–4RX Phased-Array FMCW Radar Transceiver With Antenna-in-Package," in IEEE Journal of Solid-State Circuits, vol. 52, no. 5, pp. 1245-1259, May 2017.
[8]A. Puglielli et al., "Design of Energy- and Cost-Efficient Massive MIMO Arrays," in Proceedings of the IEEE, vol. 104, no. 3, pp. 586-606, March 2016.
[9]Y. Chang, Y. Wang, C. Chen, Y. Wu and H. Wang, "A V-Band Power Amplifier With 23.7-dBm Output Power, 22.1% PAE, and 29.7-dB Gain in 65-nm CMOS Technology," in IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 11, pp. 4418-4426, Nov. 2019.
[10]Y. Lin and V. K. Nguyen, "94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1285-1298, June 2017.
[11]B. Sewiolo, G. Fischer and R. Weigel, "A 30 GHz Variable Gain Amplifier With High Output Voltage Swing for Ultra-Wideband Radar," in IEEE Microwave and Wireless Components Letters, vol. 19, no. 9, pp. 590-592, Sept. 2009.
[12]Y. Wang, B. Afshar, T. Cheng, V. Gaudet and A. M. Niknejad, "A 2.5mW inductorless wideband VGA with dual feedback DC-offset correction in 90nm CMOS technology," 2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008.
[13]J. Cheng, F. Huang, Y. Gao, L. Wu and Y. Tian, "A 1GHz CMOS variable gain amplifier with 70dB linear-in-magnitude controlled gain range for UWB systems," 2009 15th Asia-Pacific Conference on Communications, 2009.
[14]S. C. Cripps, RF power amplifiers for wireless communications, Artech House, 2006.
[15]T. Suzuki, Y. Kawano, M. Sato, T. Hirose and K. Joshin, "60 and 77GHz Power Amplifiers in Standard 90nm CMOS," 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2008.
[16]C. Y. Law and A. Pham, "A high-gain 60GHz power amplifier with 20dBm output power in 90nm CMOS," 2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010.
[17]T. Xi, S. Huang, S. Guo, P. Gui, D. Huang and S. Chakraborty, "High-Efficiency E-Band Power Amplifiers and Transmitter Using Gate Capacitance Linearization in a 65-nm CMOS Process," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 3, pp. 234-238, March 2017.
[18]C. Wu, Y. Lin, Y. Hsiao, C. Chou, Y. Wu and H. Wang, "Design of a 60-GHz High-Output Power Stacked- FET Power Amplifier Using Transformer-Based Voltage-Type Power Combining in 65-nm CMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 10, pp. 4595-4607, Oct. 2018.
[19]L. Chen, L. Zhang and Y. Wang, "A 26.4-dB Gain 15.82-dBm 77-GHz CMOS Power Amplifier With 15.9% PAE Using Transformer-Based Quadrature Coupler Network," in IEEE Microwave and Wireless Components Letters, vol. 30, no. 1, pp. 78-81, Jan. 2020.
[20]W. Hu et al., "A 0.18-μm CMOS RF Transceiver With Self-Detection and Calibration Functions for Bluetooth V2.1 + EDR Applications," in IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 5, pp. 1367-1374, May 2010.
[21]N. E. Farid, A. Nigam, S. A. E. A. Rahim, S. M. M. Hassan, R. Sanusi and A. I. A. Rahim, "A 40 GHz CMOS transceiver and radio front-end for the customer premise equipment unit of a radio-over-fiber system," 2013 IEEE International Conference on Ultra-Wideband (ICUWB), 2013, pp. 286-291.
[22]X. Meng, B. Chi, Y. Liu, T. Ma and Z. Wang, "A Fully Integrated 150-GHz Transceiver Front-End in 65-nm CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 4, pp. 602-606, April 2019.
[23]周建彰，94-GHz CMOS毫米波單混頻器次諧波射頻收發機晶片及具自動化洩漏迴波消除功能之60-GHz非接觸式人體呼吸心跳訊號CMOS射頻感測晶片系統設計研究，國立成功大學電腦與通信工程研究所博士論文，民國一百零八年七月。
[24]R. S. P. Tam “CMOS variable gain amplifier,” term paper, University of Toronto, 2002.
[25]歐雅文，毫米波CMOS 次諧波降頻混頻器與低相位變化之可變增益放大器射頻晶片之研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百年。
[26]B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.
[27]K. Fong, "Dual-band high-linearity variable-gain low-noise amplifiers for wireless applications," 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278), 1999, pp. 224-225.
[28]J. Xiao, I. Mehr and J. Silva-Martinez, "A High Dynamic Range CMOS Variable Gain Amplifier for Mobile DTV Tuner," in IEEE Journal of Solid-State Circuits, vol. 42, no. 2, pp. 292-301, Feb. 2007.
[29]C. Kuo, Z. Tsai, J. Tsai and H. Wang, "A 71–76 GHz CMOS variable gain amplifier using current steering technique," 2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008, pp. 609-612.
[30]余俊翰，毫米波CMOS寬頻可變增益低雜訊放大器及使用前置失真線性器之94-GHz CMOS功率放大器，國立成功大學電腦與通信工程研究所碩士論文，民國一百零三年。
[31]P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2nd ed. New York, NY, USA: Oxford Univ. Press, 2002.
[32]C. Wu, C. Lee, W. Chen and S. Liu, "CMOS wideband amplifiers using multiple inductive-series peaking technique," in IEEE Journal of Solid-State Circuits, vol. 40, no. 2, pp. 548-552, Feb. 2005.
[33]劉家妤，應用於94-GHz CMOS射頻前端與整合GIPD天線之“混頻器優先”次諧波射頻接收機的毫米波混頻器之研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百零九年。
[34]B. Razavi, Design of Integrated Circuits for Optical Communications, 2nd ed. Hoboken, NJ, USA: Wiley, 2012.
[35]Y. Wang, B. Afshar, L. Ye, V. C. Gaudet and A. M. Niknejad, "Design of a Low Power, Inductorless Wideband Variable-Gain Amplifier for High-Speed Receiver Systems," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 4, pp. 696-707, April 2012.
[36]F. Padovan, M. Tiebout, A. Neviani and A. Bevilacqua, "A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation," in IEEE Journal of Solid-State Circuits, vol. 51, no. 7, pp. 1525-1536, July 2016.
[37]T. Wu, C. Zhao, H. Liu, Y. Wu, Y. Yu and K. Kang, "A 20 ~ 43 GHz VGA with 21.5 dB Gain Tuning Range and Low Phase Variation for 5G Communications in 65-nm CMOS," 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019, pp. 71-74.
[38]J. R. Long, "Monolithic transformers for silicon RF IC design," in IEEE Journal of Solid-State Circuits, vol. 35, no. 9, pp. 1368-1382, Sept. 2000.
[39]I. Aoki, S. D. Kee, D. B. Rutledge and A. Hajimiri, "Distributed active transformer-a new power-combining and impedance-transformation technique," in IEEE Transactions on Microwave Theory and Techniques, vol. 50, no. 1, pp. 316-331, Jan. 2002.
[40]Q. J. Gu, Z. Xu and M. C. F. Chang, "Two-Way Current-Combining W-Band Power Amplifier in 65-nm CMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 5, pp. 1365-1374, May 2012.
[41]林新皓，毫米波CMOS可調式混和變壓器射頻收發機雙工放大器與V-/W-band功率放大器之研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百零八年。
[42]朱嗣堯，整合GIPD天線之60-GHz四路結合功率放大器與V-及W-band之毫米波功率放大器研製，國立成功大學電腦與通信工程研究所碩士論文，民國一百零六年。
[43]C. Chou, Y. Hsiao, Y. Wu, Y. Lin, C. Wu and H. Wang, "Design of a V-Band 20-dBm Wideband Power Amplifier Using Transformer-Based Radial Power Combining in 90-nm CMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 64, no. 12, pp. 4545-4560, Dec. 2016.
[44]Z. Tsai, Y. Hsiao, H. Liao and H. Wang, "A 90-GHz power amplifier with 18-dBm output power and 26 GHz 3-dB bandwidth in standard RF 65-nm CMOS technology," 2013 IEEE MTT-S International Microwave Symposium Digest (MTT), 2013, pp. 1-3.
[45]H. Jia, B. Chi, L. Kuang and Z. Wang, "A W-Band Power Amplifier Utilizing a Miniaturized Marchand Balun Combiner," in IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 2, pp. 719-725, Feb. 2015.
[46]H. S. Son, J. Y. Jang, D. M. Kang, H. J. Lee and C. S. Park, "A 109 GHz CMOS Power Amplifier With 15.2 dBm Psat and 20.3 dB Gain in 65-nm CMOS Technology," in IEEE Microwave and Wireless Components Letters, vol. 26, no. 7, pp. 510-512, July 2016.
[47]Y. Lin and V. K. Nguyen, "94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 6, pp. 1285-1298, June 2017.
[48]Y. Lin and K. Lan, "Design and Analysis of a 94 GHz CMOS Power Amplifier Using Miniature Current Combiner," 2020 IEEE Radio and Wireless Symposium (RWS), 2020, pp. 5-8.
[49]S. Lin, J. Kuo and H. Wang, "A 60 GHz Sub-Harmonic Resistive FET Mixer Using 0.13 μm CMOS Technology," in IEEE Microwave and Wireless Components Letters, vol. 21, no. 10, pp. 562-564, Oct. 2011.
[50]H. Hsieh and L. Lu, "A 40-GHz Low-Noise Amplifier With a Positive-Feedback Network in 0.18-μm CMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 8, pp. 1895-1902, Aug. 2009.
[51]D. A. Chan and M. Feng, "A Compact W-Band CMOS Power Amplifier With Gain Boosting and Short-Circuited Stub Matching for High Power and High Efficiency Operation," in IEEE Microwave and Wireless Components Letters, vol. 21, no. 2, pp. 98-100, Feb. 2011.
[52]H. Samavati, H. R. Rategh and T. H. Lee, "A 5-GHz CMOS wireless LAN receiver front end," in IEEE Journal of Solid-State Circuits, vol. 35, no. 5, pp. 765-772, May 2000.
[53]B. Huang, K. Lin and H. Wang, "Millimeter-Wave Low Power and Miniature CMOS Multicascode Low-Noise Amplifiers with Noise Reduction Topology," in IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 12, pp. 3049-3059, Dec. 2009.
[54]H. Kuo and H. Chuang, "A 60-GHz high-gain, low-power, 3.7-dB noise-figure low-noise amplifier in 90-nm CMOS," 2013 European Microwave Conference, 2013, pp. 1555-1558.
[55]P. Wu, T. Kijsanayotin and J. F. Buckwalter, "A 71–86-GHz Switchless Asymmetric Bidirectional Transceiver in a 90-nm SiGe BiCMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 64, no. 12, pp. 4262-4273, Dec. 2016.
[56]B. Sadhu et al., "7.2 A 28GHz 32-element phased-array transceiver IC with concurrent dual polarized beams and 1.4 degree beam-steering resolution for 5G communication," 2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017, pp. 128-129.
[57]H. Su, R. Hu and C. Wu, "A 78 - 102 GHz Front-End Receiver in 90 nm CMOS Technology," in IEEE Microwave and Wireless Components Letters, vol. 21, no. 9, pp. 489-491, Sept. 2011.
[58]S. Shahramian, Y. Baeyens, N. Kaneda and Y. Chen, "A 70–100 GHz Direct-Conversion Transmitter and Receiver Phased Array Chipset Demonstrating 10 Gb/s Wireless Link," in IEEE Journal of Solid-State Circuits, vol. 48, no. 5, pp. 1113-1125, May 2013.
[59]F. Golcuk, T. Kanar and G. M. Rebeiz, "A 90 - 100-GHz 4 x 4 SiGe BiCMOS Polarimetric Transmit/Receive Phased Array With Simultaneous Receive-Beams Capabilities," in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 8, pp. 3099-3114, Aug. 2013.
[60]A. Natarajan, A. Valdes-Garcia, B. Sadhu, S. K. Reynolds and B. D. Parker, "W-Band Dual-Polarization Phased-Array Transceiver Front-End in SiGe BiCMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 6, pp. 1989-2002, June 2015.