跳到主要內容

臺灣博碩士論文加值系統

(44.192.254.59) 您好!臺灣時間:2023/01/27 18:20
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

: 
twitterline
研究生:杜彥良
研究生(外文):Tu, Yen-Liang
論文名稱:利用集成學習促進乾式氧化物金氧半電容元件的智慧製造
論文名稱(外文):Intelligent Manufacturing of Dry Oxide MOSCAP Device by Using Ensemble Learning
指導教授:林詩淳林詩淳引用關係
指導教授(外文):Lin, Shih-Chun
口試委員:蘇彬陳士偉高名璿林詩淳
口試委員(外文):Su, PinChen, Shih-WeiKao, Ming-HsuanLin, Shih-Chun
口試日期:2020-10-12
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2020
畢業學年度:109
語文別:英文
論文頁數:59
中文關鍵詞:金氧半電容元件工業4.0機器學習多層感知器集成學習
外文關鍵詞:MOS CapacitorIndustry 4.0Machine LearningMulti-Layer Perceptron(MLP)Ensemble Learning
相關次數:
  • 被引用被引用:2
  • 點閱點閱:201
  • 評分評分:
  • 下載下載:41
  • 收藏至我的研究室書目清單書目收藏:0
隨著半導體產業的逐年發展,根據摩爾定律,元件的尺寸以及關鍵維度 正逐年縮小中。元件縮小會導致其中的物理機制複雜化(例:短通道效應、熱載子效應……等)以及生產成本提高,也因此我們在設計元件時必須要考慮所有的參數因素,且參數之間很容易有取捨效應。模擬的部分,傳統的BSIM模型我們可以改變元件的幾何參數去模擬出元件或電路的特性曲線,但是隨著元件尺寸的縮小,傳統的BSIM模型無法表現出小元件特有的物理性質,進而產生出較多誤差。
此研究我們將利用金氧半電容器以及機器學習去創造出機器學習模型,進而促進元件的智慧製造。MOSCAP元件是利用國研院半導體中心(TSRI)的機台去製作,且相較於傳統BSIM模型,我們將改變製程變異的參數,再利用MOSCAP量測出的C-V曲線,以及機器學習中的集成學習與機器學習中最常用的多層感知器去做C-V曲線的模擬,並且比較兩者的準確性,進而去創造製程意識機器學習模型來取代傳統BSIM模型
According to the Moore’s law, with the development of the semiconductor industry year by year, the size of devices and critical dimensions (CD) are shrinking year by year. The shrinkage of components will lead to the complexity of the physical mechanism (ex. short channel effect, hot carrier effect... etc.) and the increase of production cost. Therefore, we must consider all parameter factors when designing devices, and the parameters are easy to have trade-offs. For the simulation, we can change the geometric parameters to simulate the characteristic curve of the device or the circuit in the traditional BSIM model. However, as the size of the device shrinks, the traditional BSIM model cannot show the unique physical properties of small components and will lead to more errors.
In this research, we will use Metal-Oxide-Semiconductor Capacitor (MOSCAP) and machine learning to create machine learning models to promote smart manufacturing of devices. MOSCAP devices are manufactured using TSRI machines. We will change the parameters of process variation and then use the measured MOSCAP C-V curves and ensemble learning as well as multi-layer perceptron(MLP) mostly used in machine learning to fit our C-V curves. After that, we can create process-aware machine learning model and replace the conventional BSIM model.
摘要 i
ABSTRACT ii
誌謝 iii
Content iv
Figure List vi
Table List x
Symbol List xi
Chapter 1 Introduction 1
1.1 Introduction to MOSCAP 1
1.2 Introduction to Machine Learning 4
1.3 Introduction to Industry 4.0 6
1.4 Introduction to Ensemble Learning 7
1.4.1 Bagging 7
1.4.2 Boosting 8
1.5 Literature Review 9
Chapter 2 Experiment Method 11
2.1 Experiment Equipment 11
2.1.1 Wet Bench 11
2.1.2 Horizontal Furnace 12
2.1.3 Spin Coating and Developing System 13
2.1.4 I-Line Stepper 15
2.1.5 Dry Etching Machine 15
2.1.6 PVD Machines 16
2.2 Experiment Process 18
2.3 Device Measurement 19
2.3.1 Parameter Variation 20
2.3.2 How the Parameters Affect C-V Curve? 22
Chapter 3 Results and Discussions 25
3.1 Sample Measurements and Comparisons 25
3.1.1 Clean Method Comparison 27
3.1.2 Top Electrode Machine Comparison 31
3.1.3 Analysis for Device Measurement 35
3.2 Quality of the Device 35
3.3 Model Fitting 39
Chapter 4 Conclusion and Future Works 55
References 56
[1] J. Friedman, T. Hastie, and R. Tibshirani, "Additive logistic regression: a statistical view of boosting (with discussion and a rejoinder by the authors)," The annals of statistics, vol. 28, no. 2, pp. 337-407, 2000.
[2] J. A. Walls, A. J. Walton, and J. M. Robertson, "The application of AI techniques to the control and interpretation of C-V measurements," in International Conference on Microelectronic Test Structures, 5-7 March 1990, pp. 205-210.
[3] J. A. Walls, A. J. Walton, J. M. Robertson, and T. M. Crawford, "Automating and sequencing C-V measurements for process fault diagnosis using a pattern-recognition approach (MOS test structure)," in Proceedings of the 1989 International Conference on Microelectronic Test Structures, 13-14 March 1989, pp. 193-199.
[4] L. Breiman, "Bagging predictors," Machine learning, vol. 24, no. 2, pp. 123-140, 1996.
[5] B. Rong, "Capacitance-voltage characterization for MOS capacitor on p-type high-resistivity silicon substrate," in Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004, vol. 1, pp. 198-201.
[6] J. A. Walls, "Capacitance-voltage measurements: an expert system approach," University of Edinburgh, 1990.
[7] C. Jund and R. Poirier, "Carrier concentration and minority carrier lifetime measurement in semiconductor epitaxial layers by the MOS capacitance method," Solid-State Electronics, vol. 9, no. 4, pp. 315-319, 1966.
[8] C. Sah, R. N. Noyce, and W. Shockley, "Carrier Generation and Recombination in P-N Junctions and P-N Junction Characteristics," Proceedings of the IRE, vol. 45, no. 9, pp. 1228-1243, 1957.
[9] F. Zezulka, P. Marcon, Z. Bradac, J. Arm, T. Benesl, and I. Vesely, "Communication Systems for Industry 4.0 and the IIoT," (in English), Ifac Papersonline, vol. 51, no. 6, pp. 150-155, 2018.
[10] C. Sah and H. Fu, "Current and capacitance transient responses of MOS capacitor. I. General theory and applications to initially depleted surface without surface states," physica status solidi (a), vol. 11, no. 1, pp. 297-310, 1972.
[11] B. Rong, L. K. Nanver, J. N. Burghartz, A. B. M. Jansman, A. G. R. Evans, and B. S. Rejaei, "C-V characterization of MOS capacitors on high resistivity silicon substrate," in ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003, pp. 489-492.
[12] K. Zaininger and F. Heiman, "The CV technique as an analytical tool," Solid State Technology, vol. 13, no. 5–6, 1970.
[13] R. C. Jaeger, F. H. Gaensslen, and S. E. Diehl, "An Efficient Numerical Algorithm for Simulation of MOS Capacitance," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 2, no. 2, pp. 111-116, 1983.
[14] J. T. Watt and J. D. Plummer, "Efficient numerical simulation of the high-frequency MOS capacitance," IEEE Transactions on Electron Devices, vol. 34, no. 10, pp. 2214-2216, 1987.
[15] T. G. Dietterich, "Ensemble learning," The handbook of brain theory and 29neural networks, vol. 2, pp. 110-125, 2002.
[16] R. Polikar, "Ensemble learning," in Ensemble machine learning: Springer, 2012, pp. 1-34.
[17] H. Li et al., "Ensemble Learning for Overall Power Conversion Efficiency of the All-Organic Dye-Sensitized Solar Cells," IEEE Access, vol. 6, pp. 34118-34126, 2018.
[18] C. Zhang and Y. Ma, Ensemble machine learning: methods and applications. Springer, 2012.
[19] L. S. Dalenogare, G. B. Benitez, N. F. Ayala, and A. G. Frank, "The expected contribution of Industry 4.0 technologies for industrial performance," (in English), Int J Prod Econ, vol. 204, pp. 383-394, Oct 2018.
[20] T. G. Dietterich, "An experimental comparison of three methods for constructing ensembles of decision trees: Bagging, boosting, and randomization," Machine learning, vol. 40, no. 2, pp. 139-157, 2000.
[21] K.-E. Årźen, "Expert systems for process control," in Applications of Artificial Intelligence in Engineering Problems: Springer, 1986, pp. 1127-1138.
[22] S. Lei, M. Xinming, X. Lei, and H. Xiaohong, "Financial Data Mining Based on Support Vector Machines and Ensemble Learning," in 2010 International Conference on Intelligent Computation Technology and Automation, 11-12 May 2010, vol. 2, pp. 313-314.
[23] Z. Zhu, Z. Wang, D. Li, Y. Zhu, and W. Du, "Geometric Structural Ensemble Learning for Imbalanced Problems," IEEE Transactions on Cybernetics, vol. 50, no. 4, pp. 1617-1629, 2020.
[24] K. Taniguchi, "Graphical technique to determine minority carrier lifetime and surface generation velocity using triangular-voltage sweep C-V method," Solid-State Electronics, vol. 21, no. 8, pp. 1057-1061, 1978.
[25] H. Yuan, M. Fang, and X. Zhu, "Hierarchical Sampling for Multi-Instance Ensemble Learning," IEEE Transactions on Knowledge and Data Engineering, vol. 25, no. 12, pp. 2900-2905, 2013.
[26] A. Goetzberger, "Ideal MOS curves for silicon," Bell System Technical Journal, vol. 45, no. 7, pp. 1097-1122, 1966.
[27] I. G. McGillivray, J. M. Robertson, and A. J. Walton, "Improved measurements of doping profiles in silicon using CV techniques," IEEE Transactions on Electron Devices, vol. 35, no. 2, pp. 174-179, 1988.
[28] A. G. Frank, L. S. Dalenogare, and N. F. Ayala, "Industry 4.0 technologies: Implementation patterns in manufacturing companies," (in English), Int J Prod Econ, vol. 210, pp. 15-26, Apr 2019.
[29] R. Y. Zhong, X. Xu, E. Klotz, and S. T. Newman, "Intelligent Manufacturing in the Context of Industry 4.0: A Review," (in English), Engineering, vol. 3, no. 5, pp. 616-630, Oct 2017.
[30] J. A. Walls, A. J. Walton, and J. M. Robertson, "Interpretation and Control of C-V Measurements Using Pattern-Recognition and Expert System Techniques," (in English), Ieee T Semiconduct M, vol. 4, no. 3, pp. 250-262, Aug 1991.
[31] J. A. Walls, A. J. Walton, J. M. Robertson, and T. M. Crawford, "Interpretation of capacitance-voltage curves for process fault diagnosis: a machine-learning expert system approach," in Proceedings of the IEEE International Conference on Microelectronic Test Structures, 22-23 Feb. 1988, pp. 174-178.
[32] A. Berman and D. R. Kerr, "Inversion charge redistribution model of the high-frequency MOS capacitance," Solid-State Electronics, vol. 17, no. 7, pp. 735-742, 1974.
[33] R. Forsyth and R. Rada, Machine learning: applications in expert systems and information retrieval. Halsted Press, 1986.
[34] N. Fujimaki, "Method and apparatus for measuring high-frequency CV characteristics of MIS device," ed: Google Patents, 1995.
[35] T.-H. Lee, C.-S. Liao, and J.-G. Hwu, "Modulation of Minority Carriers in the C-V Characteristics of MIS Tunneling Diode by Surrounding MOS Capacitor," ECS Transactions, vol. 80, no. 1, pp. 387-392, 2017.
[36] E. H. Nicollian, J. R. Brews, and E. H. Nicollian, MOS (metal oxide semiconductor) physics and technology. Wiley New York, 1982.
[37] N. Arora, "MOS capacitor," in MOSFET Models for VLSI Circuit Simulation: Springer, 1993, pp. 121-166.
[38] G. I. Webb and Z. Zheng, "Multistrategy ensemble learning: reducing error by combining ensemble learning techniques," IEEE Transactions on Knowledge and Data Engineering, vol. 16, no. 8, pp. 980-991, 2004.
[39] M. A. Fischler and R. C. Bolles, "Perceptual organization and curve partitioning," in Readings in computer vision: Elsevier, 1987, pp. 210-215.
[40] A. Khan and K. Turowski, "A Perspective on Industry 4.0: From Challenges to Opportunities in Production Systems," (in English), Iotbd: Proceedings of the International Conference on Internet of Things and Big Data, pp. 441-448, 2016.
[41] S. Hofstein and G. Warfield, "Physical limitations on the frequency response of a semiconductor surface inversion layer," Solid-State Electronics, vol. 8, no. 3, pp. 321-341, 1965.
[42] J. Brews, "Rapid interface parameterization using a single MOS conductance curve," Solid-state electronics, vol. 26, no. 8, pp. 711-716, 1983.
[43] F. Huang, G. Xie, and R. Xiao, "Research on Ensemble Learning," in 2009 International Conference on Artificial Intelligence and Computational Intelligence, Nov. 2009, vol. 3, pp. 249-252 .
[44] J. Nagy, J. Olah, E. Erdei, D. Mate, and J. Popp, "The Role and Impact of Industry 4.0 and the Internet of Things on the Business Strategy of the Value Chain-The Case of Hungary," (in English), Sustainability-Basel, vol. 10, no. 10, Oct 2018.
[45] V. Alcacer and V. Cruz-Machado, "Scanning the Industry 4.0: A Literature Review on Technologies for Manufacturing Systems," (in English), Eng Sci Technol, vol. 22, no. 3, pp. 899-919, Jun 2019.
[46] J. Yu-yan, "Selective Ensemble Learning Algorithm," in 2010 International Conference on Electrical and Control Engineering, 25-27 June 2010, pp. 1859-1862.
[47] W. Van Gelder and E. Nicollian, "Silicon impurity distribution as revealed by pulsed MOS C‐V measurements," Journal of the Electrochemical Society, vol. 118, no. 1, p. 138, 1971.
[48] A. Jakubowski and K. Iniewski, "Simple formulas for analysis of C-V characteristics of MIS capacitor," Solid-State Electronics, vol. 26, no. 8, pp. 755-756, 1983.
[49] J. R. Brews, "A simplified high-frequency MOS capacitance formula," Solid-State Electronics, vol. 20, no. 7, pp. 607-608, 1977.
[50] B. T. Chen, J. F. Wan, L. Shu, P. Li, M. Mukherjee, and B. X. Yin, "Smart Factory of Industry 4.0: Key Technologies, Application Case, and Challenges," (in English), Ieee Access, vol. 6, pp. 6505-6519, 2018.
[51] B. Mazhari and A. Mahajan, "An improved interpretation of depletion approximation in p-n-junctions," IEEE Transactions on Education, vol. 48, no. 1, pp. 60-62, 2005.
連結至畢業學校之論文網頁點我開啟連結
註: 此連結為研究生畢業學校所提供,不一定有電子全文可供下載,若連結有誤,請點選上方之〝勘誤回報〞功能,我們會盡快修正,謝謝!
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
無相關期刊