(3.236.214.19) 您好!臺灣時間:2021/05/06 19:58
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果

詳目顯示:::

我願授權國圖
: 
twitterline
研究生:王怡婷
研究生(外文):Wang, Yi-Ting
論文名稱:以頻率量測FSR力感測器之研究
論文名稱(外文):A Study of Force Sensing Resistor Measurement by Frequency
指導教授:陳寶龍陳寶龍引用關係
指導教授(外文):Chen, Pao-Lung
口試委員:李素玲陳慶永陳寶龍
口試委員(外文):Lee, Su-LingChen, Ching-YungChen, Pao-Lung
口試日期:2020-09-24
學位類別:碩士
校院名稱:國立高雄科技大學
系所名稱:電腦與通訊工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2020
畢業學年度:109
語文別:中文
論文頁數:75
中文關鍵詞:鎖頻迴路飛加器
外文關鍵詞:Frequency-Locked LoopFlying-Adder
相關次數:
  • 被引用被引用:0
  • 點閱點閱:30
  • 評分評分:系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
  本研究中,我們對力感測電阻器 (Force Sensing Resistors;FSR) 分別以電壓及頻率之方式進行量測與討論。傳統以電壓方式量測,為因應物聯網的時代,將數據數位化以便進行分析利用,免去儀器攜帶不便的問題,我們提出了以頻率的方式來對感測器進行量測。
  對頻率的偵測及再生,是為了能夠以重製再生的頻率取代原本之頻率,以減少使用儀器量測。而以頻率方式進行的量測主要以 FPGA 來實現全數位鎖頻迴路 (All-Digital Frequency Locked Loop;ADFLL) 以及飛加器倍頻器,全數位鎖頻迴路之頻率控制位元 (Control_word) 以十進制呈現整數值,飛加器倍頻器則是兩位元的整數及六位元小數以十六進制來顯示。其結果先以萬用計頻器 (Counter) 量測,確認其重製結果的準確性,再以頻率控制位元來做再生頻率的實現,達到取代傳統量測儀器的目的。
  先以力感測電阻器結合 555 無穩態振盪電路來產生待量測之頻率,其值在 1.0644504677kHz 至 9.8306277397kHz。接著將全數位鎖頻迴路及飛加器倍頻器之頻率控制位元的值呈現於 FPGA 七段顯示器上。最後便能直接以頻率控制位元的結果來推算出力感測電阻器之電阻值。另外,再針對誤差的部分做探討,以理論方式推導出誤差之計算公式為 ∆F=(F_input)^2⁄F_sampling ,對量測結果進行分析比較,全數位鎖頻迴路以萬用計頻器量測及頻率控制位元計算之誤差分別在 ±0.08Hz 和 ±3Hz 之內,而飛加器倍頻器以萬用計頻器量測及頻率控制位元計算之誤差分別在 ±0.0004Hz 及 ±4Hz 內,更進一步證實以頻率的方式來進行量測之結果確實可行。

  In this study, we measure the Force Sensing Resistors (FSR) by the measurements of voltage and frequency respectively. Since the Internet of Things has almost become a trend, and we have to digitize the data for analysis.
  The purpose of frequency detection and regeneration is to replace the original frequency with the regenerated frequency, and to reduce the use of instrumentation. Frequency measurement includes the All-Digital Frequency Locked Loop (ADFLL) and the Flying-Adder Based Frequency Multiplier that are implemented by Field Programmable Gate Array (FPGA). The frequency control word of ADFLL is displayed as an integer value in decimal. The frequency control word of the Flying-Adder Based Frequency Multiplier is displayed in hexadecimal and the value is composed of two-bit integer and six-bit decimal. In order to confirm the accuracy of the regenerated frequency by FPGA, we use the universal frequency counter to accomplish the frequency measurements. Then the value of frequency control word is used to correspond to the regenerated frequency to achieve the purpose of replacing the measuring instruments.
  First, the FSR is combined with the 555 astable multivibrator circuit to generate the frequency. The frequency value ranges from 1.0644504677kHz to 9.8306277397kHz. The frequency control word of the ADFLL and Flying-Adder Based Frequency Multiplier are displayed on the seven-segment display in the FPGA board. Finally, the resistance value of the force sensing resistor can be calculated by the frequency control word directly. Moreover, the measurement results are compared with the derived formula of the frequency error. The derived formula is ∆F=(F_input)^2⁄F_sampling . The measured frequency error of the ADFLL with a universal frequency counter is within ±0.08Hz, and the frequency error based on frequency control word is within ±3Hz. The measured frequency error of the Flying-Adder Based Frequency Multiplier with a universal frequency counter is within ±0.0004Hz, and the frequency error based on frequency control word is within ±4Hz. As a result, the approach of frequency measurement is practicable to measure the sensors.

摘要 i
ABSTRACT ii
致謝 iii
目錄 iv
表目錄 vi
圖目錄 vii
第一章 緒論 1
1.1 文獻探討 1
1.2 研究動機與目的 3
1.3 論文架構 4
第二章 FSR力感測電阻器與555無穩態振盪電路 5
2.1 FSR(Force Sensing Resistors)力感測電阻器 6
2.1.1 FSR力感測電阻器之電阻值量測 6
2.1.2 FSR力感測電阻器以電壓方式量測之介紹 10
2.1.3 FSR力感測電阻器以電壓方式之量測 11
2.1.4 FSR力感測電阻器之物理特性 15
2.2 555無穩態振盪電路 18
2.2.1 555無穩態振盪電路之頻率量測 21
第三章 使用全數位鎖頻迴路及飛加器倍頻器進行頻率量測 26
3.1 FPGA(Field-Programmable Gate Array) 27
3.2 全數位鎖頻迴路(ADFLL)之架構 28
3.2.1 以全數位鎖頻迴路量測 29
3.3 飛加器倍頻器之架構 35
3.3.1 以飛加器倍頻器量測 36
3.4 以頻率控制位元計算FSR力感測電阻器之電阻值 42
3.4.1 以全數位鎖頻迴路之頻率控制位元來計算電阻值 42
3.4.2 以飛加器倍頻器之頻率控制位元來計算電阻值 43
3.5 全數位鎖頻迴路與飛加器倍頻器之比較分析 45
第四章 頻率量測誤差分析 47
4.1 數位示波器及萬用計頻器之精確度差別 47
4.2 頻率誤差分析 51
第五章 結論與未來研究方向 59
5.1 結論 59
5.2 未來研究方向 59
參考文獻 60


[1]盧明智 “感測器應用與線路分析”,全華圖書,西元2000年。

[2]許桂樹,陳克群,李怡銘 “感測器原理與應用”,全華圖書,西元2007年。

[3]Eduardo Reck Miranda and Marcelo M. Wanderley, New Digital Musical Instruments: Control and Interaction Beyond the Keyboard, A/R Editions, 2006.

[4]Jacob Fraden, Handbook of Modern Sensors: Physics, Designs, and Applications, Springer Verlag, 3rd edition, Springer Verlag, 2004.

[5]Avrum Hollinger and Marcelo M. Wanderley, “Evaluation of Commercial Force Sensing Resistors,” in proceedings of the International Conference on New Interfaces for Musical Expression, 2006.

[6]C. Leboss´e, B. Bayle, M. de Mathelin, and P. Renaud, “Nonlinear modeling of low cost force sensors,” in proceedings of IEEE International Conference on Robotics and Automation, Pasadena, CA, USA, May, 2008.

[7]Claudio Castellini and Vikram Ravindra, “A wearable low-cost device based upon Force-Sensing Resistors to detect single-finger forces,” in proceedings of 5th IEEE RAS & EMBC International Conference on Biomedical Robotics and Biomechatronics, Sao Paulo, Brazil, August, 2014.

[8]Payal S. Malvade, Atul K. Joshi and Swati P. Madhe, “IoT Based Monitoring of Foot Pressure Using FSR Sensor,” in proceedings of International Conference on Communication and Signal Processing, Chennai, India, April, 2017.

[9]Gordon W. Roberts and Mohammad Ali-Bakhshian, “A Brief Introduction to Time-to-Digital and Digital-to-Time Converters,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 3, pp. 153–157, March. 2010.

[10]Meng Wang and Xia Zhang, “Method for Frequency Measurement with ApFFT Based on FPGA,” in proceedings of IEEE Advanced Information Technology, Electronic and Automation Control Conference, pp. 1177-1180, December, 2015.

[11]Sithamparanathan Kandeepan and Sam Reisenfeld, “Performance analysis of a Digital Phase-Locked Loop with a Hyperbolic Nonlinearity,” in proceedings of 5th International Conference on Information Communications & Signal Processing, Bangkok, Thailand, December, 2005.

[12]Hugh Mair and Liming Xiu, “An architecture of high-performance frequency and phase synthesis,” IEEE Journal of Solid-State Circuits, vol. 35, no. 6, pp. 835–846, June, 2000.

[13]Liming Xiu and Zhihong You, “A "Flying-Adder" Architecture of Frequency and Phase Synthesis with Scalability,” IEEE Transactions on Very Large Scale Integration Systems, vol. 10, no. 5, pp. 637–649, October, 2002.

[14]Liming Xiu, “A Fast and Power-Area Efficient Accumulator for Flying-Adder Frequency Synthesizer,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, no. 11, pp. 2439–2448, November, 2009.

[15]Gang-Neng Sung, Szu-Chia Liao, Jian-Ming Huang, Yu-Cheng Lu, and Chua-Chin Wang, “All-Digital Frequency Synthesizer Using a Flying Adder,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 8, pp. 597–601, August, 2010.

[16]Liming Xiu, Win-Ting Lin, and Tsung-Ta Lee, “Flying-Adder Fractional Divider Based Integer-N PLL: 2nd Generation FAPLL as On-Chip Frequency Generator for SoC,” IEEE Journal of Solid-State Circuits, vol. 48, no. 2, pp. 441–455, February, 2013.

[17]Stuart I. Yaniger, “Force Sensing Resistors: A Review Of The Technology,” Electro International, New York, NY, USA, April, 1991.

[18]Jian Wang and Songting Li, “A Memory-Reduced Frequency Estimator for the Measurement of Sinusoidal Signal,” IEEE Transactions on Circuits and Systems II: Express Briefs, September, 2020.

[19]陳建男,鄭木火 “使用穿戴式紡織感測器量測呼吸訊號之一新電路設計”,國立交通大學,電機與控制工程學系,碩士論文,中華民國九十八年六月。

[20]陳秋燕,陳寶龍 “頻率合成器應用於低成本電容感測器之研究”,國立高雄第一科技大學,電腦與通訊工程學系,碩士論文,中華民國一百零六年六月。

[21]Robert Neal Dean and Aditi Kiran Rane, “A Digital Frequency-Locked Loop System for Capacitance Measurement,” IEEE Transactions on Instrumentation and Measurement, vol. 62, no. 4, pp. 777-784, April, 2013.

[22]邱俊逸,陳寶龍 “低成本感測器之頻率量測”,國立高雄第一科技大學,電腦與通訊工程學系,碩士論文,中華民國一百零八年七月。

[23]Liming Xiu, “The Concept of Time-Average-Frequency and Mathematical Analysis of Flying-Adder Frequency Synthesis Architecture,” IEEE Circuits and Systems Magazine, vol. 8, no. 3, pp. 27-51, August, 2008.

[24]Liming Xiu, Pao-Lung Chen, “A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed,” IEEE Transactions on Industrial Electronics, vol. 64, no. 2, February, 2017.

[25]Satish Kumar Pal, Anand Kumar and Kapil Kumawat, “Design and VLSI Implementation of a Digital Oscilloscope,” in proceedings of Fourth International Conference on Computational Intelligence and Communication Networks, pp. 473-476, Mathura, India, November, 2012.

[26]Hao Song, Wang Yue, Jin Yuehong and Li Nuo, “Realization of automatic test system of crystal oscillator inside the universal counter,” in proceedings of 12th IEEE International Conference on Electronic Measurement & Instruments, Qingdao, China, July, 2015.

[27]Vasilis Hamilakis and Nicholas C. Voulgaris﹐ “An Accurate Method for the Measurement of Line Frequency and Its Deviation Using a Microprocessor,” IEEE Transactions on Instrumentation and Measurement, vol. IM-36, no. 1, pp. 104-109, March, 1987.

QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
系統版面圖檔 系統版面圖檔