|
1. M. Riordan and L. Hoddeson, "Crystal fire: the invention, development and impact of the transistor," in IEEE Solid-State Circuits Society Newsletter, vol. 12, no. 2, 2007, pp. 24-29. 2. "In Memoriam - Jack Kilby (1923-2005) Inventor of the integrated circuit," in IEEE Signal Processing Magazine, vol. 22, no. 5, 2005, pp. 6-7. 3. Peter Eckstein, "Jack Kilby (1923-2005)," in IEEE Annals of the History of Computing, vol. 29, no. 1, 2007, pp. 90-95. 4. BBC: https://www.bbc.co.uk/programmes/b00n90j0, [Accessed 25 August 2022] 5. GORDON E. MOORE, “The role of Fairchild in silicon technology in the early days of “Silicon Valley”,” Proceedings of the IEEE, vol. 86, no. 1, 1998, pp. 53-62. 6. Milton Ohring, Lucian Kasprzak, “Packaging Materials, Processes, and Stresses,” Editor(s): Milton Ohring, Lucian Kasprzak, Reliability and Failure of Electronic Materials and Devices (Second Edition), Academic Press, Chapter 8, 2015, pp. 443- 445. 7. Rainer Waser (Ed.), “Random Access Memories IV,” Nanoelectronics and Information Technology: Advanced Electronic Materials and Novel Devices, 2nd, corr. ed., Wiley- VCH, introduction to part IV, 2005, pp. 527-530. Yi-Yueh Chen 127 8. Milton Ohring, Lucian Kasprzak, “Memories are Made of This,” Editor(s): Milton Ohring and Lucian Kasprzak, Reliability and Failure of Electronic Materials and Devices (Second Edition), Academic Press, Chapter 2.6.2, 2015, pp. 78-80. 9. Furqan Zahoor, Tun Zainal Azni Zulkifli, and Farooq Ahmad Khanday, “Resistive random access memory (RRAM): an overview of materials, switching mechanism, performance, multilevel cell (mlc) storage, modeling, and applications,” Nanoscale Research Letters, vol. 15, 2020, pp. 90-90-26. 10. Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu and Simon M. Sze, “Resistance random access memory,” Materials Today, vol. 19, no. 5, 2016, pp. 254-264. 11. D. Kahng and S. M. Sze, “A floating-gate and its application to memory devices," The Bell System Technical Journal, vol. 46, no. 4, 1967, pp. 1288–1295. 12. F. Masuoka, M. Asano, H. Iwahashi, T. Komuro and S. Tanaka, "A new flash E2PROM cell using triple polysilicon technology," 1984 International Electron Devices Meeting, 1984, pp. 464-467. 13. F. Masuoka, M. Momodomi, Y. Iwata and R. Shirota, "New ultra high density EPROM and flash EEPROM with NAND structure cell," 1987 International Electron Devices Meeting, 1987, pp. 552-555. Yi-Yueh Chen 128 14. D. Kahng and M. M. Atalla, “Silicon-silicon dioxide field induced surface devices”, in IRE Solid-State Device Res. Conference, Bell Lab, Pittsburgh, PA., 1960. 15. Edward W. A. Young, Siegfried Mantl and Peter B. Griffin, “Silicon MOSFETs Novel Alternative Concepts,” Nanoelectronics and Information Technology: Advanced Electronic Materials and Novel Devices, 2nd, corr. ed., Rainer Waser (Ed.), Wiley-VCH, chapter 13, 2005, pp. 359-364. 16. S. M. Sze, Semiconductor Device Physics and Technology, 2nd edition, 2008, pp. 30. 17. Manzur Gill and Stefan Lai,” Floating Gate Flash Memories,” Nonvolatile Semiconductor Memory Technology: A Comprehensive Guide to Understanding and to Using NVSM Devices, Editor(s): Brown, William D. and Brewer, Joe E., New York : IEEE Press, Chapter 4,1998, pp 189-230. 18. S.M. Sze, “Evolution of Nonvolatile Semiconductor Memory: from Floating-Gate Concept to Single-Electron Memory Cell,” in S. Luryi, J. Xu and A. Zaslavsky, Eds. Future Trends in Microelectronics, Wiley Interscience, New York, 1999. 19. M.-C. Lee and H.-Y. Wong, “The impact of tunnel oxide nitridation to reliability performance of charge storage non-volatile memory devices,” Journal of Nanoscience and Nanotechnology, vol. 14, no. 2, 2014, pp. 1508-1520. Yi-Yueh Chen 129 20. Wang, B. Gao and H. Wu, H. Qian, “A drain leakage phenomenon in poly silicon channel 3D NAND flash caused by conductive paths along grain boundaries,” Microelectronic Engineering, vol. 192, 2018, pp. 66-69. 21. Xiangyu Dong, Cong Xu, Norm Jouppi and Yuan Xie, “NVSim: A circuit-level performance, energy, and area model for emerging non-volatile memory”, Emerging Memory Technologies: Design, Architecture, and Applications, Springer New York, chapter 2.2.1.2, 2013, pp. 18. 22. S. H. N. Thangadurai and A. G. Ananth, “Low power device design application by magnetic tunnel junctions in magnetoresistive random access memory (MRAM).” SN Applied Sciences. vol. 1, no. 8, 2019, pp. 828-828-7. 23. Chikako Yoshida, Hideyuki Noshiro, Yuichi Yamazaki, Takashi Iizuka, Yoshihiro Stoh and Masaki Aoki, "Reliability of MgO tunneling barrier for MRAM device," 2006 IEEE International Reliability Physics Symposium Proceedings, 2006, pp. 697-698. 24. Betty Prince, “Ferroelectric RAMs,“ Emerging Memories: Technologies and Trends Ferroelectric RAMs, Boston : Kluwer Academic Publishers, 2002, chapter 1.7, pp. 15- 16. 25. T. Mikolajick, U. Schroeder and S. Slesazeck, "The past, the present, and the future of ferroelectric memories," in IEEE Transactions on Electron Devices, vol. 67, no. 4, 2020, pp. 1434-1443. Yi-Yueh Chen 130 26. Xiangyu Dong, Cong Xu, Norm Jouppi and Yuan Xie, “NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory,” Emerging Memory Technologies: Design, Architecture, and Applications, Springer New York, chapter 2.2.1.3, 2013, pp. 19. 27. Le Gallo, Manuel and Sebastian, Abu, "An overview of phase-change memory device physics," Journal of Physics D: Applied Physics. vol. 53, no. 21, 2020, pp. 213002-1~28. 28. MF. Chang, PF. Chiu, “Fundamental of ReRAM (memristor) technology,” Energy Efficient Systems Using Resistive Memory Devices. In: Xie, Y. (eds) Emerging Memory Technologies. Springer, New York, NY., 2014, pp. 83-84. 29. T. W. Hickmott, "Low‐frequency negative resistance in thin anodic oxide films," Journal of Applied Physics, vol. 33, issue 9, 1962, pp. 2669-2682. 30. S. Seoa, M. J. Lee, D. H. Seo, E. J. Jeoung, D.-S. Suh, Y. S. Joung, and I. K. Yoo, “Reproducible resistance switching in polycrystalline NiO films,” Applied Physics Letters, vol. 85, issue 23, 2004, pp. 5655–5657. 31. W. Y. Chang, Y. T. Ho, T. C. Hsu, F. Chen, M. J. Tsai, and T. B. Wu, “Influence of crystalline constituent on resistive switching properties of TiO2 memory films,” Electrochemical and Solid-State Letters, vol. 12, no.4, 2009, pp. H135–H137. 32. W. Y. Chang, K. J. Cheng, J. M. Tsai, H. J. Chen, F. Chen, M. J. Tsai, and T. B. Wu,” Improvement of resistive switching characteristics in TiO2 thin films with embedded Yi-Yueh Chen 131 Pt nanocrystals,” Applied Physics Letters, vol. 95, issue 4, 2009, pp. 042104-042104- 3. 33. H. Y. Lee, P. S. Chen, T. Y. Wu, Y. S. Chen, C. C. Wang, P. J. Tzeng, C. H. Lin, F. Chen, C. H. Lien, and M.-J. Tsai, “Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM,” IEEE International Electron Devices Meeting, 2008, pp. 1-4. 34. L. Goux, P. Czarnecki, Y. Y. Chen, L. Pantisano, X. P. Wang, R. Degraeve, B. Govoreanu, M. Jurczak, D. J. Wouters, and L. Altimime, “Evidences of oxygen-mediated resistiveswitching mechanism in TiN\HfO2\Pt cells,” Applied Physics Letters, vol. 97, issue 24, 2010, pp. 243509-243509-4. 35. W.C. Chien, Y.R. Chen, Y.C. Chen, Alfred T.H. Chuang, F.M. Lee, Y.Y. Lin, E.K. Lai, Y.H. Shih, K.Y. Hsieh, and Chih-Yuan Lu, "A forming-free WOX resistive memory using a novel self-aligned field enhancement feature with excellent reliability and scalability," 2010 International Electron Devices Meeting, 2010, pp. 19.2.1-19.2.4 36. W. C. Chien, Y. C. Chen, E. K. Lai, Y. Y. Lin, K. P. Chang, Yeong der Yao, Pang Lin, Sheng- Fu Horng, Jeng Gong, Shih Chang Tsai, C. H. Lee, S. H. Hsieh, C. F. Chen, Yen-Hao Shih, Kuang Yeu Hsieh, R. Liu, C. Y. Lu, “High-speed multilevel resistive RAM using RTO WOX ,” in: Proceedings of IEEE International Conference Solid State Devices Mater., 2009, pp. 1206–1207. Yi-Yueh Chen 132 37. Wei-Chih Chien, Kuo-Pin Chang, Yi-Chou Chen, Erh-Kun Lai, Hannes Mähne, Yeong- DerYao, Pang Lin, Jeng. Gong, Sheng-Hui Hsieh, Kuang-Yeu Hsieh, Rich Liu, and Chih-Yuan Lu, “Multilevel switching characteristics for WOX resistive RAM (RRAM),” in: Proceedings of IEEE International Conference Solid State Devices Mater., 2008, pp. 1170–1171. 38. H.-S. Philip Wong, Heng-Yuan Lee, Shimeng Yu, Yu-Sheng Chen, Yi Wu, Pang-Shiu Chen, Byoungil Lee, Frederick T. Chen, and Ming-Jinn Tsai, "Metal–Oxide RRAM," in Proceedings of the IEEE, vol. 100, no. 6, 2012, pp. 1951-1970. 39. Rainer Waser, Regina Dittmann, Georgi Staikov and Kristof Szot, "Redox‐based resistive switching memories–nanoionic mechanisms, prospects, and challenges," Advanced Materials, vol. 21, issue 25-26, 2009, pp. 2632-2663. 40. Te Jui Yen, Andrei Gismatulin, Vladimir Volodin, Vladimir Gritsenko and Albert Chin, “All nonmetal resistive random access memory.” Scientific Report, vol.9, no. 6144, 2019, pp. 1-5. 41. Yi-Yueh Chen, Wei-Chih Chien, Ming-Hsiu Lee, Yi-Chou Chen, Alfred T. H. Chuang, Tian-Jue Hong, Su-Jien Lin, Tai-Bor Wu and Chih-Yuan Lu, “Evaluation of the WOX film properties for resistive random access memory application,” Japanese Journal of Applied Physics, vol. 51, no. 4s, 2012, pp. 04DD15-04DD15-5. Yi-Yueh Chen 133 42. Sawa, Akihito. "Resistive switching in transition metal oxides," Materials Today, vol. 11, issue 6, 2008, pp. 28-36. 43. Irmak, Emrah and Mehmet Bozdal. “Internet of things (IoT): The most up-to-date challenges, architectures, emerging trends and potential opportunities,” International Journal of Computer Applications, vol. 179, 2018, pp. 20-27. 44. W. Shi, J. Cao, Q. Zhang, Y. Li and L. Xu, "Edge computing: vision and challenges," in IEEE Internet of Things Journal, vol. 3, no. 5, 2016, pp. 637-646. 45. D. Ielmini and HS.P. Wong, “In-memory computing with resistive switching devices,” Nature Electronics, vol. 1, issue 6, 2018, pp. 333–343. 46. N. Raeis-Hosseini and JS. Lee, “Resistive switching memory using biomaterials,” Journal of Electroceramics, vol. 39, issue 1, 2017, pp. 223–238. 47. Shimeng Yu, Byoungil Lee, and H.-S. Philip Wong, “Metal Oxide Resistive Switching Memory,” Functional Metal Oxide Nanostructures, vol. 149, 2012, pp. 303-335. 48. Jui-Yuan Chen, Cheng-Lun Hsin, Chun-Wei Huang, Chung-Hua Chiu, Yu-Ting Huang, Su-Jien Lin, Wen-Wei Wu, and Lih-Juann Chen, “Dynamic evolution of conducting nanofilament in resistive switching memories,” Nano Letters, vol. 13, issue 8, 2013, pp. 3671-3677. Yi-Yueh Chen 134 49. S. Bagdzevicius, K. Maas, M. Boudard and M. Burriel, “Interface-type resistive switching in perovskite materials,” Journal of Electroceramics, vol. 39, issue 1, 2017, pp. 157–184. 50. H. Y. Peng, G. P. Li, J. Y. Ye, Z. P. Wei, Z. Zhang, D. D. Wang, G. Z. Xing, and T. Wua, “Electrode dependence of resistive switching in Mn-doped ZnO: Filamentary versus interfacial mechanisms,” Applied Physics Letters, vol. 96, issue 19, 2010, pp. 2113- 2113-3. 51. R. Liu: VLSI Technology Short Course, 2010, pp. 1-64. 52. Bez Roberto and Pirovano Agostino, “Non-volatile memory technologies: emerging concepts and new materials,” Materials Science in Semiconductor Processing, vol. 7, issue 4, 2004, pp. 349-355. 53. R. Waser, "Electrochemical and thermochemical memories," 2008 IEEE International Electron Devices Meeting, 2008, pp. 1-4. 54. W. C. Chien, Y. C. Chen, E. K. Lai, Y. D. Yao, P. Lin, S. F. Horng, J. Gong, T. H. Chou, H. M. Lin, M. N. Chang, Y. H. Shih, K. Y. Hsieh, R. Liu and Chih-Yuan Lu, "Unipolar switching behaviors of RTO WOX RRAM," in IEEE Electron Device Letters, vol. 31, no. 2, 2010, pp. 126-128. 55. Toshitsugu Sakamoto, Kevin Lister, Naoki Banno, Tsuyoshi Hasegawa, Kazuya Terabe, and Masakazu Aono, “Electronic transport in Ta2O5 resistive switch,” Applied Yi-Yueh Chen 135 Physics Letters, vol. 91, 2007, p. 092110-1~092110-3. 56. W.C. Chien, F.M. Lee, Y.Y. Lin, M.H. Lee, S.H. Chen, C.C. Hsieh, E.K. Lai, H.H. Hui, Y.K. Huang, C.C. Yu, C.F. Chen, H.L. Lung, K.Y. Hsieh and Chih-Yuan Lu, "Multi-layer sidewall WOX resistive memory suitable for 3D ReRAM," 2012 Symposium on VLSI Technology (VLSIT), 2012, pp. 153-154. 57. Yi-Chou Chen, Wei-Chih Chien, Yu-Yu Lin, Feng-Ming Lee, Kuang-Yeu Hsieh and Chih-Yuan Lu, "Cu-based and WOX-based resistive switching memories (ReRAMs) for embedded and stand-alone applications," 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, 2010, pp. 1065-1068. 58. K.M. Kim, B.J. Choi, C.S. Hwang, “Localized switching mechanism in resistive switching of atomic-layer-deposited TiO2 thin films,” Applied Physics Letters, vol. 90, 2007, pp. 242906-242906-3. 59. R.G. Sharpe, P.W. Palmer,” Concerted regeneration of electroformed metal-insulatormetal devices,” Journal of Applied Physics, vol. 79, 1996, pp. 8565-8570. 60. Y. Ogimoto, Y. Tamai, M. Kawasaki and Y. Tokura, “Resistance switching memory device with a nanoscale confined current path,” Applied Physics Letters, vol. 90, 2007, pp.143515-143515-3. 61. C. B. Lee, B. S. Kang, M. J. Lee, S. E. Ahn, G. Stefanovich, W. X. Xianyu, K. H. Kim, J. H. Hur, H. X. Yin, Y. Park and I. K. Yoo, “Electromigration effect of Ni electrodes on the Yi-Yueh Chen 136 resistive switching characteristics of NiO thin films.” Applied Physics Letters, vol. 91, 2007, pp. 082104-082104-3. 62. Dongsoo Lee, Dong-jun Seong, Inhwa Jo, F. Xiang, R. Dong, Seokjoon Oh, and Hyunsang Hwang, “Resistance switching of copper doped MoOX films for nonvolatile memory applications.” Applied Physics Letters, vol. 90, 2007, pp. 122104-122104-3. 63. An Chen, S. Haddad, Yi-Ching Wu, Tzu-Ning Fang, Zhida Lan, S. Avanzino, S. Pangrle, M. Buynoski, M. Rathor, Wei Cai, N. Tripsas, C. Bill, M. Van Buskirk, M. Taguchi, "Nonvolatile resistive switching for advanced memory applications," IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest., 2005, pp. 746-749. 64. Hisashi Shima, Fumiyoshi Takano, and Hiro Akinaga, Yukio Tamai, Isao H. Inoue, Hide Takagi, “Resistance switching in the metal deficient-type oxides: NiO and CoO.“ Applied Physics Letters, vol. 91, 2007, pp. 012901-012901-3. 65. I.G. Baek, M.S. Lee, S. Seo, M.J. Lee, D.H. Seo, D.-S. Suh, J.C. Park, S.O. Park, H.S. Kim, I.K. Yoo, U.-In. Chung, J.T. Moon, "Highly scalable nonvolatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses," IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, pp. 587-590. 66. ChiaHua Ho, E. K. Lai, M. D. Lee, C. L. Pan, Y. D. Yao, K. Y. Hsieh, Rich Liu, C. Y. Lu, " A highly reliable self-aligned graded oxide WOX resistance memory: conduction mechanisms and reliability," 2007 IEEE Symposium on VLSI Technology, 2007, pp. Yi-Yueh Chen 137 228-229. 67. ChiaHua Ho, Ming-Daou Lee, Chen-Ling Pan, Erh-Kun Lai, Yeong-Der Yao, Kuang- Yeu Hsieh, Rich Liu, Chih-Yuan Lu, "A 2-bit/cell, maskless, Sself-sligned resistance memory with high thermal stability," 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2007, pp. 1-2. 68. Wei-Chih Chien, Erh-Kun Lai, Kuo-Pin Chang, Chien-Hung Yeh, Ming-Hsiang Hsueh, Yeong-Der Yao, Tuung Luoh, Sheng-Hui Hsieh, T.H. Yang, K.C. Chen, Yi-Chou Chen, Kuang-Yeu Hsieh, Rich Liu, Chih-Yuan Lu, " Unipolar switching characteristics for selfaligned WOX resistance RAM (R-RAM)," 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2008, pp. 144-145. 69. Wei-Chih Chien, Kuo-Pin Chang, Yi-Chou Chen, Erh-Kun Lai, Hannes Mähne, Yeong- Der Yao, Pang Lin, Jeng. Gong, Sheng-Hui Hsieh, Kuang-Yeu Hsieh, Rich Liu, and Chih-Yuan Lu, “Multi-level switching characteristics for WOX resistive RAM (RRAM),” 2008 International Conference on Solid State Devices and Materials, 2008, pp. 1170- 1171. 70. W. C. Chien, Y. C. Chen, K. P. Chang, E. K. Lai, Y. D. Yao, P. Lin, J. Gong, S. C. Tsai, S. H. Hsieh, C. F. Chen, K. Y. Hsieh, R. Liu, Chih-Yuan Lu, " Multi-level operation of fully CMOS compatible WOX resistive random access memory (RRAM)," 2009 IEEE International Memory Workshop, 2009, pp. 1-2. Yi-Yueh Chen 138 71. Erh-Kun Lai, Wei-Chih Chien, Yi-Chou Chen, Tian-Jue Hong, Yu-Yu Lin, Kuo-Pin Chang, Yeong-Der Yao, Pang Lin, Sheng-Fu Horng, Jeng Gong, Shih-Chang Tsai, Ching-Hsiung Lee, Sheng-Hui Hsieh, Chun-Fu Chen, Yen-Hao Shih, Kuang-Yeu Hsieh, Rich Liu, and Chih-Yuan Lu, “Tungsten oxide resistive memory using rapid thermal oxidation of tungsten plugs,” Japanese Journal of Applied Physics, vol. 49, no. 4s, 2010, pp. 04DD17-04DD17-4. 72. W.C. Chien, Y.R. Chen, Y.C. Chen, Alfred T.H. Chuang, F.M. Lee, Y.Y. Lin, E.K. Lai, Y.H. S, K.Y. Hsieh, Chih-Yuan Lu, "A forming-free WOX resistive memory using a novel selfaligned field enhancement feature with excellent reliability and scalability," 2010 International Electron Devices Meeting, 2010, pp. 19.2.1-19.2.4. 73. Wei-Chih Chien, Ming-Hsiu Lee, Feng-Ming Lee, Yu-Yu Lin, Hsiang-Lan Lung, Kuang- Yeu Hsieh, Chih-Yuan Lu, "Multi-level 40nm WOX resistive memory with excellent reliability," 2011 International Electron Devices Meeting, 2011, pp. 31.5.1-31.5.4. 74. W.C. Chien, Y.C. Chen, E.K. Lai, F.M. Lee, Y.Y. Lin, Alfred T.H. Chuang, K.P. Chang, Y.D. Yao, T.H. Chou, H.M. Lin, M.H. Lee, Y.H. Shih, K.Y. Hsieh, Chih-Yuan Lu, “A study of the switching mechanism and electrode material of fully CMOS compatible tungsten oxide ReRAM,” Applied Physics A, vol. 102, issue 4, 2011, pp. 901–907. 75. Yi-Yueh Chen, Wei-Chih Chien, Ming-Hsiu Lee, Yi-Chou Chen, Alfred T. H. Chuang, Tian-Jue Hong, Su-Jien Lin, Tai-Bor Wu and Chih-Yuan Lu, “Evaluation of the WOX Yi-Yueh Chen 139 film properties for ReRAM application,” Solid State Devices and Materials, Area: 4, Session no. P-4-7, 2011. 76. Wei-Chih Chien, Ming-Hsm Lee, Feng-Ming Lee, Wei-Chen Chen, Dai-Ying Lee, Yu- Yu Lin, Erh-Kun Lai, Hsiang-Lan Lung, Kuang-Yeu Hsieh, Chih-Yuan Lu, "A novel high performance WOX ReRAM based on thermally-induced SET operation," 2013 Symposium on VLSI Technology, 2013, pp. T100-T101. 77. Feng-Min Lee, Yu-Yu Lin, Wei-Chih Chien, Erh-Kun Lai, Dai-Ying Lee, Chih-Chieh Yu, Han-Hui Hsu, Ming-Hsiu Lee, Hsiang-Lan Lung, Kuang-Yeu Hsieh and Chih-Yuan Lu, "A low-cost, forming-free WOX ReRAM using novel self-aligned photo-induced oxidation," 2013 IEEE International Electron Devices Meeting, 2013, pp. 20.7.1-20.7.4. 78. Elia Ambrosi, Alessandro Bricalli, Mario Laudato and Daniele Ielmini, “Impact of oxide and electrode materials on the switching characteristics of oxide ReRAM devices,” Faraday Discuss, vol. 213, 2019, pp. 87-98. 79. Karen A. Reinhardt and Werner Kern (2008), Handbook of Silicon Wafer Cleaning Technology (2nd ed.), William Andrew, 2008, p. 208. 80. James D. Plummer, Michael D. Deal and Peter B. Griffin, "Back End Technology", Silicon VLSI Technology: Fundamentals, Practice, and Modeling, Upper Saddle River, NJ: Prentice Hall, Chapter 11, 2000, pp. 681–786. Yi-Yueh Chen 140 81. Clara Santato, Marek Odziemkowski, Martine Ulmann and Jan Augustynski, “Crystallographically Oriented Mesoporous WO3 Films: Synthesis, Characterization, and Applications,” Journal of the American Chemical Society, vol. 123, issue 43, 2001, pp. 10639-10649. 82. C. Bittencourt, R. Landers, E. Llobet, X. Correig and J. Calderer, “The role of oxygen partial pressure and annealing temperature on the formation of W=O bonds in thin WO3 films,” Semiconductor Science and Technology, vol. 17, no.6, 2002, pp. 522-525. 83. B. E. Deal and A. S. Grove, “General relationship for the thermal oxidation of silicon,” Journal of Applied Physics, vol. 36, no. 12, 1965, pp. 3770-3778. 84. Hisashi Fukuda, Makoto Yasuda Makoto Yasuda and Toshiyuki Iwabuchi Toshiyuki Iwabuch, “Kinetics of rapid thermal oxidation of silicon,” Japanese Journal of Applied Physics, vol. 31, no. 10, 1992, pp. 3436-3439. 85. A. Al Mohammad, “Synthesis, Separation and Electrical Properties of WO3 − X Nanopowders via Partial Pressure High Energy Ball-Milling,” Acta Physica Polonica A, vol. 116, 2009, pp. 240-244. 86. D. Kahng and S. M. Sze, “A floating-gate and its application to memory devices," The Bell System Technical Journal, vol. 46, no. 4, 1967, pp. 1288–1295. Yi-Yueh Chen 141 87. Sze, S.M. “The floating-gate non-volatile semiconductor memory - from invention to the digital age,” Journal of Nanoscience and Nanotechnology, vol. 12, 2012, pp. 7587–7596. 88. L.D. Yau, “A simple theory to predict the threshold voltage of short-channel IGFET’s,” Solid State Electron. Vol. 17, 1974, pp. 1059–1063. 89. T. Himeno, N. Matsukawa, H. Hazama, IK. Sakui, M. Oshikiri, K. Masuda, K. Kanda, Y. Itoh and J. Miyamoto, "A new technique for measuring threshold voltage distribution in flash EEPROM devices," Proceedings International Conference on Microelectronic Test Structures, vol. 8, 1995, pp. 283-287. 90. C. H. Lee, I. C. Yang, Chienying Lee, C. H. Cheng, L. H. Chong, K. F. Chen, J. S. Huang, S. H. Ku, N. K. Zous, I. J. Huang, T. T. Han, M. S. Chen, W. P. Lu, K. C. Chen, Tahui Wang, and Chih-Yuan Lu, "Junction optimization for Reliability issues in floating gate NAND flash cells," 2011 International Reliability Physics Symposium, 2011, pp. 6B.3.1-6B.3.5. 91. Hang-Ting Lue, Szu-Yu Wang, Erh-Kun Lai, Kuang-Yeu Hsieh, Rich Liu, and Chih Yuan Lu, "A BE-SONOS (bandgap engineered SONOS) NAND for post-floating gate era flash memory," 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2007, pp. 1-2. 92. Youngbin Jin and Ben Lee, “A comprehensive survey of issues in solid state drives,” Advances in Computers, vol. 114, 2019, pp. 1- 69. Yi-Yueh Chen 142 93. Jagan Singh Meena, Simon Min Sze, Umesh Chand and Tseung-Yuen Tseng, “Overview of emerging nonvolatile memory technologies,” Nanoscale Research Letters, vol. 9, 2014, pp. 526-559. 94. S. Aritome, "Advanced flash memory technology and trends for file storage application," International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138), 2000, pp. 763-766. 95. Rainer Waser (Ed.), “Stability of Capacitor Charge and Reliability of the Cell,” Nanoelectronics and Information Technology: Advanced Electronic Materials and Novel Devices, 2nd, corr. ed., Wiley-VCH, Chapter 21.5, 2005, pp. 547-548. 96. Kamran Afshari, “Nonvolatile memory with multi-stack nanocrystals as floating gates,” In 2007 REU Research Accomplishments; National Nanotechnology Infrastructure Network, 2007, pp. 38 - 39. 97. Pieter Blomme, Maarten Rosmeulen, Antonio Cacciato, Maarten Kostermans, Christa Vrancken, Steven Van Aerde, Tom Schram, Ingrid Debusschere, Malgorzata Jurczak, Jan Van Houdt, "Novel dual layer floating gate structure as enabler of fully planar flash memory," 2010 Symposium on VLSI Technology, 2010, pp. 129-130. 98. A. Aziz A and N. Soin, "Dependency of threshold voltage on floating gate and interpolysilicon dielectric thickness for nonvolatile memory devices," 2010 IEEE International Conference on Semiconductor Electronics (ICSE2010), 2010, pp. 83-87. Yi-Yueh Chen 143 99. R. Ohba, N. Sugiyama, K. Uchida, J. Koga and A. Toriumi, "Nonvolatile Si quantum memory with self-aligned doubly-stacked dots," in IEEE Transactions on Electron Devices, vol. 49, no. 8, 2002, pp. 1392-1398. 100. Y. H. Lin and Y. Y. Yang, “Work function adjustment by using dipole engineering for TaN-Al2O3-Si3N4-HfSiOx-Silicon nonvolatile memory,” Materials, vol. 8, 2015, pp. 5112–5120. 101. Spassov Dencho, Paskaleva Albena, Guziewicz Elżbieta, Davidović Vojkan, Stanković Srboljub, Djorić-Veljković Snežana, Ivanov Tzvetan, Stanchev Todor, Stojadinović Ninoslav, “Radiation Tolerance and Charge Trapping Enhancement of ALD HfO2/Al2O3 Nanolaminated Dielectrics,” Materials, vol.14, no. 4, 2021, pp. 849. 102. Jong-Hwan Yoon, “Fabrication of Sn@Al2O3 core-shell nanoparticles for stable nonvolatile memory applications,” Materials, vol.12, 2019, pp. 3111 - 3111-7. 103. Bo Wang, Bin Gao, Huaqiang Wu and He Qian, “A drain leakage phenomenon in poly silicon channel 3D NAND flash caused by conductive paths along grain boundaries,” Microelectronic Engineering, vol.192, 2018, pp. 66–69. 104. Akira Goda., “Recent progress on 3D NAND flash technologies,” Electronics, vol. 10, 2021, pp. 3156 – 3156-16. 105. Hyeon-Joong Kim, Do-Won Kim, Won-Yong Lee, Kyoungdu Kim, Sin-Hyung Lee, Jin-Hyuk Bae, In-Man Kang, Kwangeun Kim and Jaewon Jang, “Flexible Sol-GelYi- Yueh Chen 144 Processed Y2O3 RRAM Devices Obtained via UV/Ozone-Assisted Photochemical Annealing Process,” Materials, vol. 15, 2022, pp. 1899 – 1899-11. 106. Manuel Le Gallo and Abu Sebastian, “An overview of phase-change memory device physics,” Journal of Physics D: Applied Physics, vol. 53, no. 21, 2020, pp. 213002 – 213002-28. 107. Shogo Hatayama, Yuji Sutou, Satoshi Shindo, Yuta Saito, Yun-Heub Song, Daisuke Ando and Junichi Koike, “Inverse resistance change Cr2Ge2Te6-Based PCRAM enabling ultralow-energy amorphization,” ACS Applied Materials Interfaces, vol. 10, 2018, pp. 2725–2734. 108. Zhen Fan, Jingsheng Chen and John Wang, “Ferroelectric HfO2-based materials for next-generation ferroelectric memories,” Journal of Advanced Dielectrics, vol. 6, no. 2, 2016, pp. 1630003 – 1630003-11. 109. Min Hyuk Park, Young Hwan Lee, Thomas Mikolajick, Uwe Schroeder and Cheol Seong Hwang, “Review and perspective on ferroelectric HfO2-based thin films for memory applications.” MRS Communications, vol. 8, issue 3, 2018, pp. 795–808. 110. Zongxia Guo, Jialiang Yin, Yue, Daoqian, Kewen Shi, Gefei Wang, Kaihua Cao., "Spintronics for energy- efficient computing: an overview and outlook," in Proceedings of the IEEE, vol. 109, no. 8, 2021, pp. 1398-1417. Yi-Yueh Chen 145 111. Vikas Nehra, Sanjay Prajapati, T. Nandha Kumar and Brajesh Kumar Kaushik, "Highperformance computing-in-memory architecture using STT-/SOT-Based series triple-level cell MRAM," in IEEE Transactions on Magnetics, vol. 57, no. 8, 2021, pp. 1-12. 112. William Shockley, “Electrons and Holes in Semiconductors;” Van Nostrand: Princeton, NJ, USA, 1950. 113. A. S. Grove, “Physics and Technology of Semiconductor Devices;” Wiley: NY, USA, 1967. 114. E. H. Nicollian, and Brews, J.R. “MOS Physical and Technology;” Wiley: New York, NY, USA, 1982. 115. A. E. Saatci , O. Özdemir and K. Kutlu, “Conduction mechanism analysis of inversion current in MOS tunnel diodes,” Materials Sciences and Applications, vol. 4, no. 12, 2013, 794–801. 116. B. Hoefflinger, “ITRS: The International Technology Roadmap for Semiconductors,” 2007th ed.; Springer: Berlin/Heidelberg, Germany, Chapter 7, 2011, pp. 161-174. 117. Garam Kim, Min-Chul Sun, Sang Wan Kim, Hyun Woo Kim, Jang Hyun Kim, Euy Hwan Park, Hyungjin Kim and Byung-Gook Park, "Novel MOSFET structure using p-n junction gate for ultra-low subthreshold-swing," 2011 International Semiconductor Device Research Symposium (ISDRS), 2011, pp. 1-2. Yi-Yueh Chen 146 118. V. Misra and M. C. Ozturk, “Electrical Engineering Handbook;” Elsevier: Amsterdam, The Netherlands, 2004; Chapter 3.2.4. 119. R. Micheloni and L. Crippa “Advances in Non-volatile Memory and Storage Technology;” Woodhead Publishing: Sawston, Cambridge, UK, 2019; Chapter 3.3.4. 120. J. Boukhobza and P. Olivier, “Flash Memory Integration;” Elsevier: Amsterdam, The Netherlands, 2017; Chapter 2.1.2.
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