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研究生:陳怡月
研究生(外文):Chen, Yi-Yueh
論文名稱:氧化鎢電阻式記憶體與快閃記憶體新型浮閘之製作與操作特性研究
論文名稱(外文):Fabrication and Operation Characteristics Research of WOx Resistive Random Access Memory (ReRAM) and New Floating Gate of NAND Flash Memory
指導教授:林樹均張守一
指導教授(外文):Lin, Su-JienChang, Shou-Yi
口試委員:吳孟奇闕郁倫謝光宇黃盛絨
口試委員(外文):Wu, Meng-ChyiChueh, Yu-LunHsieh, Kuang-YeuHuang, Sheng-Rong
口試日期:2022-07-07
學位類別:博士
校院名稱:國立清華大學
系所名稱:材料科學工程學系
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2022
畢業學年度:110
語文別:英文
論文頁數:146
中文關鍵詞:半導體元件快閃記憶體記憶單元浮閘n-p 結電荷洩漏電阻式記憶體氧化鎢快速熱氧化
外文關鍵詞:semiconductor deviceNAND Flashmemory cellfloating gaten-p junctioncharge leakageResistive Random Access MemoryReRAMWOxRTO
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近年來,由於物聯網、行動裝置、高速計算機、智慧汽車等行業的快速發展,
人工智慧和邊緣計算等龐大數據計算的應用需求大幅增加。DRAM 和NAND 型快閃記憶體
都無法滿足減低功率消耗和讀/寫速度提升的要求。此外,由於記憶體尺寸微縮限制問
題,半導體製程需要一種新的嵌入式非揮發性記憶體技術來滿足這些需求。在過去的幾
十年裡,世界各地的許多研究人員為下一代非揮發性記憶體投入了大量的研究。
在本論文中,研究了兩種快閃記憶體,一種是氧化鎢電阻式記憶體,成功藉由
系統性的實驗計畫及電性與物性的分析,深度瞭解氧化鎢電阻式記憶體的氧化鎢快速熱
氧化製程的最佳形成條件。並更進一步藉由高解析度電子顯微鏡、X 光繞射圖譜、拉曼
光譜、二次離子質譜之縱深分析、X 光光電子能譜儀的表面分析與歐傑電子縱深分析和
電性特性測試,分析其微觀結構;結晶結構;氧化物化學組成及分析熱氧化生長動力學
和氧化鎢電阻式記憶體的高低電阻態的切換機制與原理,使更進一步明瞭其切換機制是
發生在上電極與氧化層界面上而不是在整層氧化鎢上。另一種是開發新型np 型多晶矽
組成的新型浮閘NAND 型快閃記憶體,藉由浮閘中形成n-p 結在界面處形成載子耗盡區
作為障蔽層,使浮閘薄層電阻增加,電荷洩漏減小;利用此特性成功提高浮閘元件編寫
能力並同時降低浮閘元件的電荷洩漏。如此在不改變製程材料及元件結構尺寸的前提下
獲得更高的浮閘元件能力。
In the past decades, many researchers around the world have invested a lot of
studies for the next-generation non-volatile memory or improve the exist device
performance to meet the power consumption and read/write speed requirements. Hence, in
this thesis, two types of flash memory are investigated, one is tungsten oxide resistive
memory another is new types of floating gates composed of pn-type polysilicon or np-type
polysilicon NAND Flash.
To understand the optimal condition for the rapid thermal oxidation process which
forms the WOX layer, various annealing temperature and annealing time are systemically
studied through HRTEM, X-ray diffraction, Raman spectra, SIMS, nano Auger, XPS analyses
and electrical characterization test. The growth kinetics for WOX under rapid thermal
oxidation is found. And further suggests the switching behavior of WOX resistive random
access memory takes place at the interface but not the bulk.
Two new types of floating gates composed of pn-type or np-type polysilicon were
developed to lower the charge leakage of device and improve the operation performance
toward a smaller structure size and a higher component capability. By forming an n-p
junction in the floating gate, the sheet resistance was increased, and the charge leakage was
reduced because of the formation of a carrier depletion zone at the junction interface serving
as an intrinsic potential barrier. Additionally, the threshold voltage and erasing voltage of the
np-type floating gate were elevated, suggesting the effectively improved performance of the
floating gate in the operation of memory devices can be achieved without the application of
new materials or the change of physical structure.
Chapter 1 Introduction 1
1-1 History 1
1-2 Motivation 7
Chapter 2 Literature Review 8
2-1 Semiconductor Memory 8
2-2 Non-Volatile Memory 13
2-3 Emerging Non-Volatile Memory 19
2-3-1 MRAM 19
2-3-2 FeRAM 22
2-3-3 PCRAM 24
2-3-4 ReRAM 26
2-4 ReRAM Materials 34
2-4-1 Organic materials 34
2-4-2 Binary metal oxide materials 37
2-5 ReRAM Switching Mechanisms 39
2-5-1 Conducting filament model 39
2-5-2 Interface-type conducting 43
Chapter 3 RTO WOX ReRAM 45
3-1 Introduction 45
3-2 Device fabrication 49
3-3 Material analysis 55
3-4 Conduction mechanism 68
3-5 Oxidation temperature dependence 76
3-6 Oxidation time dependence 84
3-7 Summary 91
Chapter 4 np-poly Floating Gate of NAND Flash 92
4-1 Introduction 92
4-2 Device fabrication 95
4-3 Material analysis 99
4-4 Sheet resistance and charge mechanism 104
4-5 Threshold voltage and erasing voltage discussion 114
4-6 Summary 120
Chapter 5 Conclusions 121
Publications List 123
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