臺灣博碩士論文加值系統

隨著市場發展和科學技術進步，功率元件對於半導體產業已經是不可或缺的存在。本論文研究主題是廣泛應用高壓領域的LDMOS，由於LDMOS具有出色的熱穩定性、高增益、高效率開關、能夠承受高擊穿電壓和高工作電流等優點，因此它在射頻電路中佔有一席之地，至今仍然為大宗。
本論文的重點是利用Sentaurus TCAD軟體對半導體功率器件進行模擬分析。首先，對照組採用傳統平面橫向金屬氧化物電晶體模擬，實驗組採用鰭式橫向功率金氧半場效電晶體。根據模擬結果，將傳統平面橫向金屬氧化物電晶體與鰭式橫向功率金氧半場效電晶體相比，在保持相同崩潰電壓的情況下，鰭式橫向功率金氧半場效電晶體實現了更低的導通電阻，且具有高導通電流的特性，這是因為鰭式結構，可以提高閘極的控制通道能力，使得有效通道增加，進而提升電流。
接續討論在調整不同電性參數對功率MOSFET的影響，調整的主要參數是基板濃度、n-漂移層濃度、漂移層深度、漂移層寬度，並且要在佈局面積小和崩潰電壓40 V的前提下，找出元件最佳規格。而鰭式橫向功率金氧半場效電晶體的最佳尺寸是在元件長度4.5 μm、漂移層長度1.5 μm、深度3 μm，然後將其設置為最佳化的元件規格。透過使用N型基板濃度或P型基板濃度，以及調整適當摻雜濃度的漂移層，可以將鰭式橫向功率金氧半場效電晶體展現出最佳化的電特性結果，其導通電阻約為42 〖kΩ∙μm〗^2，阻斷電壓為約 46 V。

With the development of the market and advance in science technology, power device is indispensable to the semiconductor industry. The research topic of this thesis is about LDMOS (Laterally-Diffused Metal-Oxide Semiconductor) which was used widely in high voltage applications. LDMOS can show excellent thermal stability, high gain, high efficiency switching, capability to sustain high breakdown voltage and high operating current, which is promising for RF circuit applications.
This thesis focuses on simulation and analysis of semiconductor power devices by using Sentaurus TCAD software. Based on the simulation results, when compared to conventional planar power MOSFET, fin-based power MOSFET achieves lower specific on-resistance while maintaining the same breakdown voltage. As a result, the fin-based structure can improve the gate controllability.
Furthermore, this thesis discusses the influence of adjusting different electrical parameters for power MOSFET. The main device parameters are substrate concentration, n- drift layer concentration, n- drift layer depth, and n- drift layer length. For the layout area and the blocking voltage 40 V, the optimum fin-based power MOSFET is achieved for the device parameters with device length 4.5 μm, n- drift layer length 1.5 μm, and n- drift layer depth 3 μm. By using n-drift layer with proper doping concentration of n-substrate or p-substrate, the electric characteristics of fin-based power MOSFET can show an on-state resistance of about 42 kΩ∙μm2 for a blocking voltage of about 46 V.

摘要 I
Abstract IV
Acknowledgement V
Contents VI
List of Figures VIII
List of Tables XI
Chapter 1 Introduction 1
1-1 Motivation 1
1-2 Overview of power MOSFET 2
1-2-1 Conventional planar power MOSFET 2
1-2-2 Fin-based power MOSFET 5
1-3 Device physical mechanism 6
1-3-1 Zener breakdown 6
1-3-2 Punch-through breakdown 7
1-3-3 Avalanche breakdown 7
1-4 Physical models of TCAD 8
Chapter 2 Device fabrication 10
2-1 Fin-based power MOSFET with n-type fabrication 11
2-2 Fin-based power MOSFET with p-type fabrication 16
Chapter 3 Results and Discussion 22
3-1 Conventional planar power MOSFET 22
3-1-1 Comparison with Fin-based power MOSFET 23
3-1-2 Comparison between N-Sub and P-Sub 25
3-2 Fin-based power MOSFET with n-type substrate 28
3-2-1 In different n- drift layer length condition 29
3-2-2 In different n- drift layer concentration condition 31
3-2-3 In different n-type substrate concentration condition 33
3-3 Fin-based power MOSFET with p-type substrate 35
3-3-1 In different n- drift layer depth condition 36
3-3-2 In different p-type substrate concentration condition 38
3-3-3 Comparison between N-Sub and P-Sub 40
Chapter 4 Conclusion 43
Reference 44

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