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研究生:陳泓鈞
研究生(外文):CHEN, HONG-JUN
論文名稱:應用於比例-積分-微分控制器之冪次運算查表補償乘法電路設計
論文名稱(外文):A Power of Two Lookup Table Compensation Multiplication with Circuit for Proportional-Integral-Derivative Controller
指導教授:楊博惠
指導教授(外文):YANG, PO-HUI
口試委員:黃崇勛吳松茂
口試委員(外文):HUANG,CHUNG-HSUNWU, SUNG-MAO
口試日期:2022-08-12
學位類別:碩士
校院名稱:國立雲林科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2022
畢業學年度:110
語文別:中文
論文頁數:76
中文關鍵詞:比例-積分-微分控制器乘法電路
外文關鍵詞:proportional-integral-derivative controllermultiplication circuit
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在工業控制系統中,比例-積分-微分(Proportional-Integral-Derivative Control, PID)控制因為結構簡單、穩定性高及容易調整等特性而被廣泛的使用,透過給予控制比例、積分與微分三項參數調適回授系統的誤差值計算出控制變量,使系統輸出可以維持在參考值。在數位電路的架構上,三項參數是透過數位的乘法器調整誤差值,傳統的陣列式乘法器雖容易實現高位元與高準確的運算,但會消耗更多的計算時間與硬體面積,本實驗室曾提出以桶式移位暫存器(Barrel shifter)實現冪次運算的乘法電路,能夠有效的減少乘法電路的硬體面積,但只能選擇2的冪次作為被乘數,儘管在回授系統中可以接受一些乘積的誤差,若應用於要求精確的控制系統,或是在更大的數值運算時,冪次運算的乘法會產生極大的誤差。本論文提出一個冪次運算查表補償乘法電路,電路的冪次運算可快速的計算出乘積,並補償非2的冪次乘數造成的乘積誤差,應用於數位PID控制器,改善了傳統PID中乘法器的面積與穩定性。本論文提出之冪次運算查表補償乘法PID控制器應用於開關式降壓型直流對直流轉換器在180 nm CMOS製程下的模擬中,輸入電壓為3.3 V,輸出電壓為1.5 V,工作頻率為 1 MHz時,本控制器可使其在90 µs以内穩壓到1.5 V,並在負載變化時能穩定保持在1.5 V。
In industrial control systems, Proportional-Integral-Derivative Control (PID) control is widely used because of its simple structure, high stability and easy adjustment. The parameter adaptation feedbacks the error value of the system to calculate the control variable, so that the system output can be maintained at the reference value. In the architecture of the digital circuit, the three parameters are controlled by the digital multiplier though adjust the error value. Although the traditional array multiplier is easy to achieve high-bit and high-accuracy operations, it will consume more computing time and hardware area. Our lab had proposed an exponential multiplication circuit that uses barrel shifters, which can effectively reduce the chip area of the multiplication circuit, but multiplicand only can be 2’s exponential. In the feedback system, a little error can be accepted, but when it is applied to a system that requires precision, or large bits operations, the exponential multiplication will produce larger error. This paper proposes a power of two lookup table compensation multiplication. The exponential operation can quickly calculate the product, and compensate the multiplier error which not 2’s exponential, to decrease the product error of multiplication. This paper applied to the digital PID controller, it could reduce chip area and more stability then traditional PID. This power of two lookup table compensation multiplication PID controller is applied to the switch mode dc-dc buck converter with TSMC 180 nm CMOS process. The input voltage is 3.3 V, the output voltage is 1.5 V, and the operating frequency is at 1 MHz. This circuit can restore to 1.5 V within 90 μs, and remains stable at 1.5 V when the loading changes.
摘要
ABSTRCT
目錄
表目錄
圖目錄
第一章 緒論
1.1 研究動機與目的
1.2 研究方法
1.3 研究流程
1.4 論文架構
第二章 近似乘法器介紹
2.1 傳統乘法器
2.1.1 陣列式乘法器
2.1.2 Wallace Tree結構的乘法器
2.1.3 傳統乘法器比較
2.2 近似乘法器
2.2.1 Underdesigned Multiplier
2.2.2 降低路徑複雜度近似乘法器
2.2.3 容錯乘法器
2.3 冪次運算乘法器
第三章 比例-積分-微分控制系統
3.1 比例-積分-微分控制原理
3.1.1 比例增益控制
3.1.2 積分增益控制
3.1.3 微分控制
3.1.4 系統穩定性
3.1.5 連續PID的離散化
第四章 冪次運算查表補償乘法電路設計
4.1 補償乘法電路
4.1.1 LSB 冪次補償乘法電路
4.1.2 冪次運算查表補償乘法電路
4.2 使用冪次運算查表補償乘法之PID控制器
第五章 模擬結果
5.1 回授系統
5.2 系統模擬
5.3 Hspice模擬
第六章 結論
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