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研究生:張育銘
研究生(外文):CHANG,YU-MING
論文名稱:基於模擬退火演算法之減少衝突測試點加入技術
論文名稱(外文):Conflict-Reducing Test Point Insertion based on Simulated Annealing
指導教授:陳勇志陳勇志引用關係曾王道
指導教授(外文):CHEN,YUNG-CHIHTSENG,WANG-DAUH
口試委員:曾王道林榮彬
口試委員(外文):TSENG,WANG-DAUHLIN, RUNG-BIN
口試日期:2022-07-18
學位類別:碩士
校院名稱:元智大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2022
畢業學年度:110
語文別:中文
論文頁數:41
中文關鍵詞:可測試性設計減少衝突測試點模擬退火演算法
外文關鍵詞:Design for testingConflict-Reducing Test PointSimulated Annealing
相關次數:
  • 被引用被引用:1
  • 點閱點閱:159
  • 評分評分:
  • 下載下載:23
  • 收藏至我的研究室書目清單書目收藏:0
在現今邏輯閘層次抽象化 (gate level abstraction) 和傳統的故障模型 (固定型故障
和變遷) 不再足以確保高質量和百万分之低缺陷的指標,因此後來就產生新的針對時序
相關和實際佈局的故障模型的新的生成工具 (generation tools) 出現,但是隨後也跟著
產生新的問題,也就是測試樣本集 (test set) 膨脹後而需要更多的儲存空間。
因此在先前的論文,研究者提出了跟傳統不同的可測試性設計技術,他們著重在
電路中衝突的辨識和處理,透過在電路中加入額外的邏輯閘來減少衝突與減少測試樣
本數量。從他們實驗研究結果可以發現這是一個可以有效減少測試型樣的數量並達到
減少自動測試型樣產生系統的運行時間。
所以我們也著重在電路衝突的處理去達到減少測試型樣的目的,並嘗試使用模擬
退火演算法來找尋可減少衝突的邏輯閘插入點,不同於先前的技術直接取得電路中所
有故障的數量去處理後再交給自動測試型樣產生系統執行。
最後我們的方法因為著重在找尋前期加入邏輯閘可以減少比較多測試型樣的點,
所以在加入總共閘數量的 1% 時有不錯的結果,但是後期因為一次加入過多的邏輯閘會
造成演算法比較難再找到比較好的結果了。

In the present gate level abstraction, traditional fault models (stuck-at and transi-
tion) are no longer sufficient to ensure high-quality and low defects-per million (DPM)
indicators. Therefore, new fault models for timing-related and actual layout for timing-
related were generated later. However, a new problem also arises that the test set expands,
which requires more storage space.
Therefore, in the previous work, researchers propose a new design for testing tech-
nique which focuses on the identification and processing of conflicts in a circuit, and
reduces the conflicts as well as tests by inserting extra gates, called conflict-reducing test
points.
According to the reported experimental results, the technique is an effective method
to reduce test patterns and reduce the run time of automatic test pattern generation.
In this thesis, we also focus on the handling of circuit conflicts to achieve the purpose
of reducing test patterns, and use the simulated annealing (SA) algorithm to determine
the insertion location of conflict-reducing test points.
Since we focus on finding the better locations in the beginning. The results show
that adding 1% of gates can get more effective points to reduce conflicts. However, when our method adds too many gates, it is hard for the SA algorithm to find better solutions.

摘要 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
誌謝 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
表目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
表目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
圖目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
圖目錄 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
第一章 緒論 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 研究背景與動機 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 貢獻 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 論文的組織 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
第二章 文獻探討 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Conflicts on internal lines . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Conflict-Reducing Test Point . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Reduce conflicts with CRTP . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.4 衝突類別 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5 模擬退火演算法 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
第三章 研究方法 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 群組和 Candidates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 結合 ATPG 的方法流程 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 研究中減少衝突所使用的方法 . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 CRTP insertion based on SA . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5.1 Add gates 和 SA move . . . . . . . . . . . . . . . . . . . . . . . . . 14
第四章 實驗結果 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 實驗環境 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 實驗結果 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
第五章 結論 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
参考文献 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

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