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研究生:陳耘志
研究生(外文):Yun-Chih Chen
論文名稱:藉由資料冗餘、壽命與索引的特性來設計更聰明的儲存系統
論文名稱(外文):Designing Smarter Storage Systems with Application Semantics of Data Redundancy, Lifetime, and Indexing
指導教授:郭大維郭大維引用關係張原豪張原豪引用關係
指導教授(外文):Tei-Wei KuoYuan-Hao Chang
口試委員:施吉昇洪士灝許建平廖弘源陳銘憲
口試委員(外文):Chi-Sheng ShihShih-Hao HungJang-Ping SheuHong-yuan LiaoMing-Syan Chen
口試日期:2023-07-06
學位類別:博士
校院名稱:國立臺灣大學
系所名稱:資訊工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2023
畢業學年度:111
論文頁數:111
中文關鍵詞:固態硬碟儲存系統垂直整合設計錯誤校正資料索引儲存內計算
外文關鍵詞:Solid-State DriveStorage SystemCo-designError CorrectionData IndexingIn-storage Computing
DOI:10.6342/NTU202301579
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在大數據時代,巨量資料的儲存需求推動了固態硬碟 (SSD) 的快速創新。然而,儲存系統與上層軟體之間的溝通管道仍繼承過去硬碟時代的介面,形成軟硬體之間的資訊落差。此落差導致運行效率低落:硬體不能根據軟體需求運行,軟體也不能充分利用硬體豐富的可調整性。本論文提出三種垂直整合設計來解決這一問題。第一種垂直整合設計—Reptail—利用軟體中的冗餘資料,為卡住的讀取提供第二次排程機會,從而減少讀取的等待時間。第二種垂直整合設計—ZoneLife—利用軟體中的暫存資料來減少錯誤更正的開銷,在不犧牲資料安全的前提下,能大幅度減少不必要的寫入,因此提高 SSD 的壽命。第三種垂直整合設計是一個新型的儲存晶片—Search-in-Memory (SiM),它能識別資料頁面的結構、在晶片內部進行高平行度比對,實現高效數據索引。它具有一個高通用性介面,能作為眾多資料結構之基本單元;它不須額外計算單元,而是藉由現有之邏輯閘在晶片內進行計算。這種新型晶片能克服馮紐曼架構下 I/O 頻寬的瓶頸、大幅度降低資料傳輸量與其功耗,打破「儲存系統僅用於儲存資料」的傳統思維。本論文旨在縮小硬體與軟體之間的代溝,透過三種新穎的垂直整合來實現更有效率、更聰明的儲存系統。
Solid-State Drive (SSD)-based storage systems have evolved rapidly in response to the exponential growth of data. However, the standard block device interface that connects storage systems and applications fails to capitalize on SSDs' increasing sophistication, resulting in operational inefficiencies. This dissertation proposes to address this issue through an open interface that promotes tighter vertical integration. Three innovative co-designs are presented to accomplish this. The first co-design, Reptail, exploits data redundancy common in applications to provide a second chance to schedule a blocked read request, considerably reducing request's waiting time. The second co-design, ZoneLife, utilizes the prevalence of short-lived data to reduce error correction overhead, enhancing SSD lifespan by reducing unnecessary write overhead. The third co-design, Search-in-Memory (SiM), recognizes a common data layout across many data structures, enabling in-storage computing and efficient data indexing.
Furthermore, this dissertation goes beyond traditional concepts of storage systems as mere data repositories. Recent improvements in NAND flash technology make it possible to overcome the I/O bandwidth bottleneck of the von Neumann architecture by computing directly on the storage chip. The dissertation presents an innovative design to reduce I/O size and power consumption by relocating data-bound computations from the CPU to the storage. Through the three proposed innovative co-designs, this dissertation aims to bridge the gap between hardware and software, realizing a future where storage systems are denser, faster, smarter, and more efficient.
Verification Letter from the Oral Examination Committee i
Acknowledgements ii
摘要 iv
Abstract v
Contents vii
List of Figures xi
List of Tables xiii
Chapter 1 Introduction 1
1.1 The Need for a New Storage Interface . . . . . . . . . . . . . . . . . 1
1.2 Harnessing Rich Sources of Application Semantics . . . . . . . . . . . 2
1.3 Storage System Can Do More Than Storing Data . . . . . . . . . . . . 4
1.4 Structure of the Dissertation . . . . . . . . . . . . . . . . . . . . . . . 4
Chapter 2 Background 7
2.1 The Architecture of Solid-State Drive (SSD) . . . . . . . . . . . . . . 7
2.1.1 SSD’s Overall Architecture . . . . . . . . . . . . . . . . . . . . . 8
2.1.2 SSD’s Microarchitecture . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Design Challenge 1: Reliability . . . . . . . . . . . . . . . . . . . . . 10
2.3 Design Challenge 2: Performance Stability . . . . . . . . . . . . . . . 13
2.4 Design Challenge 3: Power . . . . . . . . . . . . . . . . . . . . . . . 15
2.5 The Price of High-density Storage . . . . . . . . . . . . . . . . . . . . 18
2.5.1 Trade-off I: Performance Stability . . . . . . . . . . . . . . . . . 18
2.5.2 Trade-off II: Access Latency . . . . . . . . . . . . . . . . . . . . 19
Chapter 3 Data Redundancy 21
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 Reptail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3.1 Redundancy Mapping Framework (RMF) . . . . . . . . . . . . . 26
3.3.2 Online Defragmentation . . . . . . . . . . . . . . . . . . . . . . 28
3.3.3 Replica Management . . . . . . . . . . . . . . . . . . . . . . . . 30
3.3.4 Garbage Collection . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.4 Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.4.1 Experiment Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.4.2 Experiment Results . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.5 Related Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Chapter 4 Data Lifetime 40
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.2 The Data Lifetime Semantics . . . . . . . . . . . . . . . . . . . . . . 43
4.2.1 Are ephemeral data abundant in real workloads? . . . . . . . . . 43
4.2.2 Can data lifetime be determined accurately? . . . . . . . . . . . . 45
4.2.3 Limitations of Existing Lifetime Interface . . . . . . . . . . . . . 46
4.2.4 A New Co-design Based on Data Lifetime . . . . . . . . . . . . . 47
4.3 ZoneLife: Overall Architecture . . . . . . . . . . . . . . . . . . . . . 47
4.4 ZoneLife: Detailed Design . . . . . . . . . . . . . . . . . . . . . . . 50
4.4.1 Address Translation . . . . . . . . . . . . . . . . . . . . . . . . 50
4.4.2 An Example ECC Tier Configuration . . . . . . . . . . . . . . . 51
4.4.3 Multi-rate ECC Construction . . . . . . . . . . . . . . . . . . . . 52
4.4.4 ECC Tier Table . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.5 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.5.1 ZoneLife API . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.5.2 Data Lifetime Granularity . . . . . . . . . . . . . . . . . . . . . 55
4.5.3 Data Loss Protection . . . . . . . . . . . . . . . . . . . . . . . . 56
4.5.4 Overhead Analysis . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.5.5 Dynamic Zone Retirement . . . . . . . . . . . . . . . . . . . . . 58
4.6 Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.6.1 Experiment Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.6.2 Experiment Results . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.7 Related Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.8 Limitations and Future Work . . . . . . . . . . . . . . . . . . . . . . 68
4.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Chapter 5 Data Indexing 70
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
5.2 Motivations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.2.1 The importance of Optimizing Data Transfer . . . . . . . . . . . 73
5.2.2 Optimizing for Efficiency . . . . . . . . . . . . . . . . . . . . . 74
5.2.3 Benefits of On-chip Matching . . . . . . . . . . . . . . . . . . . 76
5.2.4 Enhancing Data Indexing through On-chip Matching . . . . . . . 78
5.3 The Search-in-Memroy Chip . . . . . . . . . . . . . . . . . . . . . . 79
5.3.1 SiM Page Format . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.3.2 SiM Command Format . . . . . . . . . . . . . . . . . . . . . . . 81
5.3.3 Storage and Match Mode . . . . . . . . . . . . . . . . . . . . . . 82
5.3.4 Integrating SiM with existing indexing data structures . . . . . . 83
5.4 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
5.4.1 Extending Existing Circuit . . . . . . . . . . . . . . . . . . . . . 88
5.4.2 Data integrity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
5.4.3 Host OS Implementation . . . . . . . . . . . . . . . . . . . . . . 94
5.5 Experiments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.6 Related Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Chapter 6 Concluding Remarks 101
References 103
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