臺灣博碩士論文加值系統

本論文提出了一種用於具有雙側自適應死區時間發生器 (DTG) 的基於 GaN 的同步降壓轉換器的柵極驅動器 IC，以提高傳統固定或單側 DTG 的轉換器效率。 所提議的驅動器 IC 包含兩個主要子塊，例如相位誤差檢測器 (PED) 和粗調/精細控制器。 應用邊沿檢測原理，所提出的死區時間控制可以最小化死區時間和開關電壓兩端的反向傳導損耗，Vx，使用 e-mode GaN 器件的 1MHz 12 V 至 5 V 降壓轉換器具有 0.2 至 2 A 負載電流範圍。 設計的 IC 採用 TSMC 0.18 μm HVG2 工藝製造。 根據測量結果，1 A 負載電流下的最小死區時間為 47 ps。 在負載條件 I_load=0.8 A 時，峰值效率達到 94.15%。與 10 ns 固定 DTG 相比，模擬效率提高了約 2.16%。

This thesis proposes a gate driver IC for a GaN-based synchronous buck converter with a double-sided adaptive dead-time generator (DTG) to improve the converter efficiency of conventional fixed or single-sided DTGs. The proposed driver IC contains two main sub-blocks such as the phase error detector (PED) and the coarse/fine controllers. Applying the edge detection principle, the proposed dead-time control can minimize the dead-time and reverse conduction loss on both edges of the switching voltage, Vx, of a 1MHz 12 V to 5 V buck converter using e-mode GaN devices with 0.2 to 2 A load current range. The designed IC is fabricated with TSMC 0.18 μm HVG2 process. According to the measurement results, the minimum dead time at 1 A load current is 47 ps. The peak efficiency achieves 94.15 % at load condition I_load=0.8 A. Compared with a 10 ns fixed DTG, the simulated efficiency is improved by approximate 2.16 %.

Oral examination committee approval letter I
Acknowledgement II
Abstract III
Table of Contents IV
List of Figures VII
List of Tables XII
Chapter 1 Introduction 1
1.1 Research Background 1
1.2 Thesis Motivation 2
1.3 Thesis Outline 4
Chapter 2 Literature Review of Gate Driver IC for GaN Devices 6
2.1 Overview of GaN Devices 6
2.2 General Analyses and Motivation of Dead-time Control 9
2.3 Review of Level Shifter 14
2.4 Review of Bootstrap Circuit 17
2.5 Summary 20
Chapter 3 Concept of Proposed Gate Driver IC 21
3.1 System Structure of Gate Driver IC 21
3.2 Overall Operation Principle 23
3.3 Phase Error Detector 25
3.4 Concept of Coarse/Fine Controller 27
3.5 Concept of A Double Side Dead-time Generator 29
3. 6 Summary 33
Chapter 4 Circuit Implementation and Functionality 34
4.1 Phase Error Detector 34
4.1.1 Comparator 36
4.2 Course/Fine Controller 43
4.2.1 Coarse Controller 43
4.2.2 Fine Controller 45
4.3 Double-sided Adaptive Dead-time Control 49
4.3.1 Management of Dead-time on Falling Side of Vx 49
4.3.2 Management of Dead-time on Rising Side of Vx 51
4.3.3 Varactor’s Properties and Operations 53
4.3.4 Modelling Dead-time on Falling Side of Vx 55
4.4 Gate Driver 59
4.5 Level Shifter 62
4.6 Active Bootstrap Circuit 63
4.7 Full Transistor-Level Simulation 65
Chapter 5 Measurement Results 70
5.1 Introduction 70
5.2 Printed Circuit Board (PCB) Design and Measurement Setup 74
5.3 Measurement Results 77
Chapter 6 Conclusion and Future Work 89
6.1 Conclusions 89
6.2 Future works 90
References 91

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