臺灣博碩士論文加值系統

在類比佈局設計中，類比子電路的佈局設計風格通常對電路性能的影響最大。過去的大部分研究將不同工藝間的佈局轉換，稱為佈局遷移。我們認為，在流程之間進行轉換時，更應該關注子電路中的佈局。本文介紹了類比構建佈局合成的新問題表述和新方法。它從模擬設計存儲庫中的遺留佈局中提取各種構建佈局和佈線拓撲，通過變分自動編碼器（VAE）學習拓撲，最後將構建佈局與訓練模型合成為佈線指導。實驗結果表明，與傳統的模擬構建塊生成或遷移方法相比，所提出的方法可以實現更好的性能。

In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on the circuit performance. Most of the previous work has
proposed switching to a different process based on an existing design called layout migration. We believe that when converting between processes, we should pay more
attention to building block layout. This paper introduces a new problem formulation and novel methodology for analog building block layout synthesis. It extracts various the building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder (VAE), and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.

Chapter 1.Introduction.......1
1.1 OurContributions.......4
Chapter 2.Preliminaries.......6
2.1 Variational Autoencoder.......6
Chapter 3.Problem Formulation.......9
3.1 Analog Building Block Layout Generation.......9
3.2 Placement Template Extraction.......9
3.3 Routing Information Extraction.......10
3.4 Template-based Placement Generation.......10
3.5 Detailed Routing With Routing Guidance.......10
Chapter 4.Proposed Method.......11
4.1 Building Block Learning.......11
4.1.1 Building Block Classification&Extraction.......12
4.1.2 Placement Template and Routing Topology Extraction.......14
4.1.3 VAE Model Training.......18
4.2 Building Block Layout Synthesis.......24
4.2.1 Template-Based Placement Generation.......25
4.2.2 Routing Guidance Mapping&Detailed Routing.......28
Chapter 5.Experiment Results.......31
5.1 Experiments Results.......31
5.1.1 Folded-Cascode Operational Amplifier.......32
5.1.2 Variable-Gained Amplifier.......36
Chapter 6.Conclusions.......40
Bibliography.......41

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