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研究生:李鄭群
研究生(外文):Lee, Cheng-Chun
論文名稱:利用機器學習進行晶圓級封裝晶圓之錯誤樣式分類
論文名稱(外文):Utilizing Machine Learning for Failure Pattern Classification in Wafer-level Packaging Wafers
指導教授:劉敦仁劉敦仁引用關係
指導教授(外文):Liu, Duen-Ren
口試委員:羅濟群廖純中劉敦仁
口試委員(外文):Lo, Chi-ChunLiau, Churn-JungLiu, Duen-Ren
口試日期:20230628
學位類別:碩士
校院名稱:國立陽明交通大學
系所名稱:管理學院資訊管理學程
學門:電算機學門
學類:電算機一般學類
論文種類:學術論文
論文出版年:2023
畢業學年度:111
語文別:中文
論文頁數:36
中文關鍵詞:卷積神經網絡晶圓地圖錯誤樣式
外文關鍵詞:Convolutional Neural NetworkWafer Map ClassificationWafer Failure Pattern Defect
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在半導體製程中,晶圓的製造流程非常精密與複雜,尤其近年產業將晶圓的製程推進到3奈米甚至更小的尺寸,使得製造難度大幅提升,增加了在過程中產生瑕疵的可能性。而在晶圓級封裝的晶圓製程中,工程師可以藉由觀察錯誤晶粒的分布情況,分析可能產生錯誤的原因,進而解決問題並提升良率,有幾種錯誤樣式(Failure Pattern)是已經被歸類出來的,例如Center、Donut、Edge-Loc等等錯誤樣式,不同的錯誤樣式可能對應幾種可能造成的原因,有利工程師進行下一步的驗證,目前產線工程師仍常以肉眼檢查晶圓地圖(Wafer Map)來確認錯誤樣式,雖然以人工視覺檢查的方式可以確保其正確性,但肉眼辨認依然存在限制,辨識的準確性與效率,可能因為疲勞與專業度不夠而下降,當錯誤晶圓分布較複雜時,誤判之情形可能增加。
為了提高晶圓級封裝晶圓的檢測效率和準確性,近年來越來越多研究者開始將機器學習方法應用於半導體產業當中,例如深度學習的卷積神經網路(Convolutional Neural Network, CNN)在影像的分類問題上有非常優異的表現,從大量的資料中學習各種錯誤樣式特徵,進而分類。本研究使用目前主流之四種影像分類模型VGG19、ResNet50、Xception和進行深度學習EfficientNet-B7,並比較其性能。
研究結果表明,利用機器學習方式訓練之模型,能有效識別晶圓上不同之錯誤樣式,從而實現提高檢測效率和準確度的目標。這也確認了機器學習方法具有取代傳統人工視覺檢查的潛力。
In semiconductor manufacturing, the fabrication of wafers is highly precise and complex. Especially in recent years, the industry has pushed wafer fabrication to scales as small as 3 nanometers or even smaller, dramatically raising the level of manufacturing difficulty and increasing the likelihood of defects. In the process of wafer-level packaging, engineers can observe the distribution of erroneous grains, analyze potential causes of errors, and subsequently resolve issues to enhance yield rates. Several failure patterns, such as Center, Donut, and Edge-Loc, have been categorized. Different error patterns may correspond to various potential causes, aiding engineers in subsequent verification. Currently, line engineers often inspect wafer maps visually to identify error patterns. While this manual visual inspection can ensure accuracy, limitations remain in visual recognition. The accuracy and efficiency of recognition may diminish due to fatigue and insufficient expertise, increasing the possibility of misjudgment when the error distribution on the wafer is complex.

To improve the inspection efficiency and accuracy of wafers at the wafer-level packaging stage, an increasing number of researchers have started to implement machine learning methods in the semiconductor industry. For instance, Convolutional Neural Networks (CNN), a type of deep learning, exhibit excellent performance in image classification tasks, learning various error pattern features from extensive data. This study employed four mainstream image classification models VGG19, ResNet50, Xception and EfficientNet-B7 for deep learning, comparing their performance.

The research findings suggest that models trained via machine learning methods can effectively identify different error patterns on wafers, thereby achieving the goal of enhancing inspection efficiency and accuracy. This also confirms the potential of machine learning methods to supplant traditional manual visual inspection.
中文摘要 i
ABSTRACT ii
誌 謝 iv
目 錄 v
表 目 錄 vi
圖 目 錄 vii
第一章 緒論 1
1.1 研究背景 1
1.2 研究動機與目的 1
1.3 論文架構 3
第二章 文獻探討 4
2.1 晶圓地圖 4
2.2 晶圓地圖錯誤樣式 4
2.3 WM-811K晶圓資料集 5
2.4 不平衡數據資料集 5
2.5 影像資料擴增 6
2.6 深度學習與卷積神經網路 7
2.7 VGG19 7
2.8 ResNet50 8
2.9 Xception 10
2.10 EfficientNetB7 10
第三章 研究方法 12
3.1 研究架構 12
3.2 資料前處理 14
3.2.1 樣本擴充 14
3.2.2 樣本變形 15
3.3 建立模型 16
第四章 實驗評估 18
4.1 系統建置環境 18
4.2 分類模型的績效評估 18
4.3 實驗結果與分析 20
4.3.1 綜合評估分析 32
第五章 結論與未來方向 33
5.1 研究結論 33
5.2 未來方向 34
參考文獻 35
Abadi, M., Barham, P., Chen, J., Chen, Z., Davis, A., Dean, J., . . . Isard, M. (2016). Tensorflow: a system for large-scale machine learning. Paper presented at the Osdi.
Albawi, S., Mohammed, T. A., & Al-Zawi, S. (2017). Understanding of a convolutional neural network. Paper presented at the 2017 international conference on engineering and technology (ICET).
Chollet, F. (2017). Xception: Deep learning with depthwise separable convolutions. Paper presented at the Proceedings of the IEEE conference on computer vision and pattern recognition.
Deng, J., Dong, W., Socher, R., Li, L.-J., Li, K., & Fei-Fei, L. (2009). Imagenet: A large-scale hierarchical image database. Paper presented at the 2009 IEEE conference on computer vision and pattern recognition.
Goodfellow, I., Bengio, Y., & Courville, A. (2016). Deep learning: MIT press.
He, K., Zhang, X., Ren, S., & Sun, J. (2016). Deep residual learning for image recognition. Paper presented at the Proceedings of the IEEE conference on computer vision and pattern recognition.
Howard, A. G., Zhu, M., Chen, B., Kalenichenko, D., Wang, W., Weyand, T., . . . Adam, H. (2017). Mobilenets: Efficient convolutional neural networks for mobile vision applications. arXiv preprint arXiv:1704.04861.
Ketkar, N., & Ketkar, N. (2017). Introduction to keras. Deep learning with python: a hands-on introduction, 97-111.
Kotsiantis, S., Kanellopoulos, D., & Pintelas, P. (2006). Handling imbalanced datasets: A review. GESTS international transactions on computer science and engineering, 30(1), 25-36.
Maksim, K., Kirill, B., Eduard, Z., Nikita, G., Aleksandr, B., Arina, L., . . . Nikolay, K. (2019). Classification of Wafer Maps Defect Based on Deep Learning Methods With Small Amount of Data.
Ming-Ju, W., Jang, J.-S. R., & Jui-Long, C. (2015). Wafer Map Failure Pattern Recognition and Similarity Ranking for Large-Scale Data Sets. IEEE Transactions on Semiconductor Manufacturing, 28(1), 1-12. doi:10.1109/tsm.2014.2364237
Shorten, C., & Khoshgoftaar, T. M. (2019). A survey on image data augmentation for deep learning. Journal of big data, 6(1), 1-48.
Simonyan, K., & Zisserman, A. (2014). Very deep convolutional networks for large-scale image recognition. arXiv preprint arXiv:1409.1556.
Tan, M., & Le, Q. (2019). Efficientnet: Rethinking model scaling for convolutional neural networks. Paper presented at the International conference on machine learning.
Yu, N., Xu, Q., & Wang, H. (2019). Wafer Defect Pattern Recognition and Analysis Based on Convolutional Neural Network. IEEE Transactions on Semiconductor Manufacturing, 32(4), 566-573. doi:10.1109/TSM.2019.2937793
工研院產科國際所. (2023). TSIA 2023年第一季台灣IC產業營運成果出爐. Retrieved from https://www.tsia.org.tw/api/DownloadPage?pageID=535
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