[1] 楊敏生,模糊理論簡介,數學傳播中央研究院數學研究所發行 ,數學傳播,
1994年, 十八卷一期.
[2] 李允中、王小璠、蘇木春,模糊理論及其應用,2012年, 第三版.
[3] 陳奇中, MATLAB程式設計與工程應用 東華書局 發行, 2022年, 第三版.
[4] Quirk.Serda ,羅文雄 譯, 半導體製造技術 滄海圖書發行,2003年, 第一版.
[5] 鍾文仁,、陳佑任,IC封裝製程與CAE應用,2021年,第四版.
[6] K. Aizawa、J. Maeda、Y. Hasegawa 和 S. Takyu,“A Study on Back Grinding Tape for
Ultra-thin Chip Fabrication”,2018 年第 20 屆電子材料與封裝國際會議 (EMAP),
中國香港,2018年,第 1-4 頁,doi:10.1109/EMAP.2018.8660772。
[7] R. Zhang, H. Liu, B. Li and T. Sugiya, "Ultra wafer thinning and dicing technology for
stacked die packages," 2016 China Semiconductor Technology International Conference
(CSTIC), Shanghai, China, 2016, pp. 1-5, doi: 10.1109/CSTIC.2016.7464047.
[8] N. S. George, A. Harish Shah, R. Tanola, J. Lu, C. Sim and H. Singh, "Comparative
Analysis of Laser Parameters effect on Laser Splash Performance During Wafer Stealth
Dicing," 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC),
Singapore, 2023, pp. 129-134, doi: 10.1109/EPTC59621.2023.10457868.
[9] N. Suzuki, K. Atsμmi, N. Uchiyama and T. Ohba, "Improving Throughput of Zero-Kerf
Singulation for Ultra-Thin Wafers using Stealth Dicing," 2018 13th International
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT),
Taipei, Taiwan, 2018, pp. 55-57, doi: 10.1109/IMPACT.2018.8625832.
[10] N. Suzuki, T. Ohba, Y. Kondo, T. Sakamoto, N. Uchiyama and K. Atsμmi, "High
Throughput and Improved Edge Straightness for Memory Applications Using Stealth
Dicing," 2018 IEEE 68th Electronic Components and Technology Conference (ECTC),
San Diego, CA, USA, 2018, pp. 2180-2185, doi: 10.1109/ECTC.2018.00327.
[11] W. H. Teh, D. S. Boning and R. E. Welsch, "Multi-Strata Stealth Dicing Before Grinding
for Singulation-Defects Elimination and Die Strength Enhancement: Experiment and
Simulation," in IEEE Transactions on Semiconductor Manufacturing, vol. 28, no. 3, pp.
408-423, Aug. 2015, doi: 10.1109/TSM.2015.2438875.
[12] Y. Xie, X. Zhang, C. Yang, L. Gao and M. Li, "Effects of Stealth Dicing Parameters on
Singulation Defects and Die Strength," 2020 21st International Conference on Electronic
Packaging Technology (ICEPT), Guangzhou, China, 2020, pp. 1-4, doi:
10.1109/ICEPT50128.2020.9202940.
[13] N. Suzuki, T. Nakamura, Y. Kondo, S
Tominaga, K. Atsμmi and T. Ohba, "Damage-Less Singulation of Ultra-Thin Wafers using
Stealth Dicing," 2020 IEEE 70th Electronic Components and Technology Conference
(ECTC), Orlando, FL, USA, 2020, pp. 1043-1049, doi: 10.1109/ECTC32862.2020.00169.
[14] M. Kμmagai, N. Uchiyama, E. Ohmura, R. Sugiura, K. Atsμmi and K. Fukμmitsu,
"Advanced Dicing Technology for Semiconductor Wafer—Stealth Dicing," in IEEE
Transactions on Semiconductor Manufacturing, vol. 20, no. 3, pp. 259-265, Aug. 2007,
doi: 10.1109/TSM.2007.901849.
[15] M. Kμmagai, N. Uchiyama, E. Ohmura, R. Sugiura, K. Atsμmi and K. Fukμmitsu,
"Advanced Dicing Technology for Semiconductor Wafer—Stealth Dicing," in IEEE
Transactions on Semiconductor Manufacturing, vol. 20, no. 3, pp. 259-265, Aug. 2007, doi:
10.1109/TSM.2007.901849.
[16] L. A. Zadeh, "Fuzzy logic," in Computer, vol. 21, no. 4, pp. 83-93, April 1988, doi:
10.1109/2.53.
[17] E. Cox, "Fuzzy fundamentals," in IEEE Spectrμm, vol. 29, no. 10, pp. 58-61, Oct. 1992,
doi: 10.1109/6.158640.
[18] 陳一峰,《晶圓切割薄膜膠絲問題改善之研究》,國立高雄應用科技大學碩士論文,2015年. (2024/04/01 查閱)
[19] 顏宏璋,《模糊理論應用於光纖網路配線設計》,國立高雄應用科技大學碩士論文,2021年. (2024/04/05查閱)
[20] 李坤儒,《半導體新產品之新製程導入可行性評估》,育達科技大學碩士論文,
2023年. (2024/04/15 查閱)
[21] DISCO Corporation,薄型晶片的切割技術DBG/SDBG,
https://www.disco.co.jp/cn_t/solution/library/dbg_process.html(2024/04/20 查閱)