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研究生:周莉菱
研究生(外文):CHOU, LI-LING
論文名稱:具數位消除電路之二加一階切換電容式三角積分調變器晶片設計
論文名稱(外文):Chip Design on the 2+1-Order Switched-Capacitor Delta-Sigma Modulator with Digital Cancellation Circuit
指導教授:宋國明宋國明引用關係
指導教授(外文):SUNG, GUO-MING
口試委員:宋國明于治平郭建宏賴瑛姿
口試委員(外文):SUNG, GUO-MINGYU, CHIH-PINGKUO, CHIEN-HUNGLAI, YING-TZU
口試日期:2024-07-19
學位類別:碩士
校院名稱:國立臺北科技大學
系所名稱:電機工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2024
畢業學年度:112
語文別:中文
論文頁數:55
中文關鍵詞:三角積分調變器切換電容式靴帶式開關數位消除電路
外文關鍵詞:delta-sigma modulatorswitched-capacitorbootstrapped switchdigital cancellation circuit
相關次數:
  • 被引用被引用:0
  • 點閱點閱:10
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  • 收藏至我的研究室書目清單書目收藏:0
摘要 i
ABSTRACT ii
誌謝 iv
表目錄 viii
圖目錄 ix
第一章 緒論 1
1.1 研究動機與背景 1
1.2 論文架構 2
第二章 三角積分調變原理與系統架構 3
2.1 類比數位轉換器基本原理 3
2.1.1 奈奎斯特取樣率之類比數位轉換器 4
2.1.2 超取樣類比數位轉換器 6
2.2 量化器 7
2.2.1 一位元量化器 7
2.2.2 多位元量化器 8
2.2.3 量化誤差 9
2.3 三角積分類比數位轉換器概述 9
2.3.1 一階雜訊頻移 11
2.3.2 多階雜訊移頻 13
2.4 三角積分調變架構介紹 15
2.4.1 回授架構 15
2.4.2 前饋架構 16
2.4.3 多級雜訊移頻架構 18
2.5 效能標準定義 19
2.5.1 訊號雜訊比 19
2.5.2 訊號雜訊失真比 19
2.5.3 動態範圍 19
2.5.4 有效位元數 19
2.5.5 總諧波失真 20
2.6 電路非理想效應 20
2.6.1 雜訊 21
2.6.2 傳輸誤差 21
2.6.3 開關脈衝穿透 22
第三章 二加一階三角積分調變器電路實現 24
3.1 電路設計流程 24
3.2 二加一階系統架構與MATLAB行為模擬 25
3.3 子電路設計與模擬 27
3.3.1 切換電容式積分器 27
3.3.2 二階米勒補償運算放大器 29
3.3.3 共模回授 32
3.3.4 比較器 33
3.3.5 重疊時脈產生器 34
3.3.6 靴帶式開關 36
3.3.7 數位消除電路 37
3.4 二加一階切換電容式三角積分調變器全系統模擬 43
第四章 整體電路佈局與模擬結果 47
4.1 佈局考量 47
4.2 電路佈局 48
4.3 佈局後模擬 49
第五章 總結與未來研究方向 51
5.1 總結 51
5.2 未來研究方向 51
參考文獻 52

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