臺灣博碩士論文加值系統

常見的移動物件偵測會因光源變化的影響而使得偵測的結果品質變差，所以抗光源變化的移動物件偵測演算法因此被提出。抗光源變化的演算法具有高運算量以及高複雜度因而在軟體實現無法達到即時的效果，為加速抗光源變化移動物件偵測演算法，我們在FPGA利用平行運算中管線加速系統運算，以及建立真值表使演算法的複雜度降低，實現VGA解析度的Local binary pattern (LBP) 背景相減，並符合系統的時序限制。在LBP背景相減演算法中計算特徵影像時需要大量的記憶體，對有限資源及頻寬的硬體電路會有資源限制及頻寬限制。我們修正LBP背景相減法的特徵擷取方式降低記憶體資源使用，再利用列緩衝器(Row Buffer)免去計算特徵影像時外部記憶體的讀取。我們在硬體合成工具Quartus II設計特徵擷取方式所使用的暫存記憶體減少84%；利用模擬工具Modelsim 模擬當使用列緩衝器時，於VGA解析度10 fps 的系統可減少115.625MHz外部記憶體頻寬使用。

The light change makes the common moving object detection results poor. Therefore, the against illumination change moving object detection is proposed. Because against light change algorithm has high computation and complexity, so it cannot reach real-time in software. To accelerate the calculation of anti-light change algorithm, we use the parallelism of pipelining to accelerate computing, and establish the truth table to reduce complexity to develop VGA resolution local binary pattern background subtraction (LBPBS) on FPGA. LBPBS needs much memory to calculate feature, for limited resources hardware, it has resource and memory bandwidth constraints. We modify the feature extraction to reduce memory, and use the row buffer to avoid off-chip memory read when calculating feature. We design the feature extraction reducing on-chip memory requirement 84% on hardware synthesis tool Quarutus II; and we reduce 115.625MHz off-chip memory bandwidth with VGA resolution 10 fps system when using row buffers on simulation tool Modelsim.

ABSTRACT(in Chinese) i
ABSTRACT ii
Acknowledgement iii
Contents iv
List of Tables v
List of Figures vi
Chapter 1. Introduction 1
Chapter 2. Related Work 6
2.1. General object detection algorithms 6
2.2. Local Binary Pattern Background Subtraction 9
2.2.1. LBP Transforming 9
2.2.2. LBP Background Modeling 10
2.2.3. Background Match 13
2.2.4. Background Update 14
Chapter 3. LBP Background Building Hardware Architecture 17
3.1. LBP Transforming hardware architecture 17
3.2. LBP Background Modeling hardware architecture 19
Chapter 4. LBPBS Hardware Architecture 24
4.1. Background match hardware architecture 24
4.2. Background update hardware architecture 28
Chapter 5. Algorithm Requirement 30
5.1. Memory requirement 30
5.2. Bandwidth requirement 32
Chapter 6. LBPBS Hardware Simulation 34
6.1. Simulation of LBP Transforming 37
6.2. Simulation of LBP Background Modeling 43
6.3. Simulation of Background match 45
Chapter 7. Conclusions 50
References 51

References
[1]Weiming Hu, Tieniu Tan, Liang Wang and S. Maybank, "A survey on visual surveillance of object motion and behaviors," IEEE Trans. Syst. Man Cybern. C, Appl. Rev., vol. 34, pp. 334-352, 2004.
[2]C. Wren, A. Azarbayejani, T. Darrell and A. Pentland, "Pfinder: real-time tracking of the human body," Proc. of the Second International Conference on Automatic Face and Gesture Recognition, pp. 51-56, Oct 1996.
[3]L. Dar-Shyang, "Effective Gaussian mixture learning for video background subtraction," IEEE Trans. Pattern Anal. Mach. Intell., vol. 27, pp. 827-832, 2005.
[4]A. Elgammal, R. Duraiswami, D. Harwood and L. S. Davis, "Background and foreground modeling using nonparametric kernel density estimation for visual surveillance," Proc. of the IEEE, vol. 90, pp. 1151-1163, 2002.
[5]D. H. Ahmed Elgammal and Larry Davis, "Non parametric model for background subtraction," Proc. Eur. Conf. Comp. Vis.(ECCV), Ireland, pp. 751-767, July 2000.
[6]H. Di, S. Caifeng, M. Ardabilian, W. Yunhong and C. Liming, "Local binary patterns and its application to facial image analysis: A survey," IEEE Trans. Syst. Man Cybern. C, Appl. Rev., vol. 41, pp. 765-781, 2011.
[7]M. Heikkila and M. Pietikainen, "A texture-based method for modeling the background and detecting moving objects," IEEE Trans. Pattern Anal. Mach. Intell., vol. 28, pp. 657-662, 2006.
[8]Y. K. Wang and C. T. Fan, " A robust background subtraction method against illumination challenge for night environment.," Proc.Computer Vision, Graphics and Image Processing, Kaohsiung, 2009.
[9]D. G. Bailey, Design for embedded image processing on FPGAs,Wiley-IEEE, Singapore, pp. 107-154, 2011.
[10]H.-Y. Chen, "Hardware implementation of real-time moving object detection with fPGA," Master Thesis, Fu Jen Catholic University, 2008.
[11]W. B. Huang, "Implementation and analysis of a parallel retinex algorithm," Master Thesis, Fu Jen Catholic University, 2011.
[12]R. Tessier and W. Burleson, "Reconfigurable computing for digital signal processing: a survey," J. VLSI Signal Process. Syst., vol. 28, pp. 7-27, 2001.
[13]D. L. Rosenband and T. Rosenband, "A design case study: CPU vs. GPGPU vs. FPGA," in Proc. 7th IEEE/ACM International Conference on Formal Methods and Models for Co-Design, Cambridge, USA, pp. 69-72, July 2009.

[14]H. Sangjin, L. Jinseok, A. Athalye, P. M. Djuric and C. We-Duke, "Design methodology for domain specific parameterizable particle filter realizations," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, pp. 1987-2000, 2007.
[15]B. Cope, P. Y. K. Cheung, W. Luk and L. Howes, "Performance comparison of graphics processors to reconfigurable logic: A case study," IEEE Trans. Comput., vol. 59, pp. 433 - 448, 2010.
[16]K. Pauwels, M. Tomasi, J. Diaz Alonso, E. Ros and M. M. Van Hulle, "A comparison of FPGA and GPU for real-time phase-based optical flow, stereo, and local Image features," IEEE Trans. Comput. , vol. 61, pp. 999-1012, 2011.
[17]J. Diaz, E. Ros, S. Mota, F. Pelayo and E. M. Ortigosa, "Subpixel motion computing architecture," Vision, Image and Signal Processing, vol. 153, pp. 869 - 880, 2006.
[18]J. Diaz, E. Ros, F. Pelayo, E. M. Ortigosa and S. Mota, "FPGA-based real-time optical-flow system," IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, pp. 274-279, 2006.
[19]C. Stauffer and W. E. L. Grimson, "Adaptive background mixture models for real-time tracking," in Proc. IEEE Computer Society Conference on Computer Vision and Pattern Recognition, Fort Collins, CO, pp. 2246, Jun 1999.
[20]J. Hongtu, V. Owall and A. Hakan, "Real-time video segmentation with VGA resolution and memory bandwidth reduction," in Proc. IEEE International Conference on Video and Signal Based Surveillance, AVSS '06, Sydney, Australia, pp. 104, Nov. 2006.
[21]H. Jiang, H. Ardö and V. Öwall, "A Hardware architecture for real-time video segmentation utilizing memory reduction techniques," IEEE Trans. Circuits Syst. Video Technol., vol. 19, pp. 226 - 236, 2009.
[22]K. Appiah and A. Hunter, "A single-chip FPGA implementation of real-time adaptive background model," in Proc. IEEE International Conference on Field-Programmable Technology, Singapore, pp. 95-102, Dec. 2005.
[23]F. Porikli, "Multiplicative background-foreground estimation under uncontrolled illumination using intrinsic images," in Proc. Seventh IEEE Workshops on Application of Computer Vision, Breckenridge, CO, pp. 20-27, Jan. 2005.
[24]R. Rodriguez-Gomez, E. Fernandez-Sanchez, J. Diaz and E. Ros, "Codebook hardware implementation on FPGA for background subtraction," Journal of Real-Time Image Processing, pp. 1-15, 2012.
[25]S. Y. Chien, S. Y. Ma and L. G. Chen, "Efficient moving object segmentation algorithm using background registration technique," IEEE Trans. Circuits Syst. Video Technol., vol. 12, pp. 577-586, 2002.

[26]S. Y. Chien, Y. W. Huang, B. Y. Hsieh, S. Y. Ma and L. G. Chen, "Fast video segmentation algorithm with shadow cancellation, global motion compensation and adaptive threshold techniques," IEEE Trans. Multimedia, vol. 6, pp. 732-748, 2004.
[27]S. Y. Chien and L. G. Chen, "Reconfiguarable morphological image processing accelerator for video object segmentation," Journal of Signal Processing Systems, vol. 62, pp. 77-96, 2011.