常見的移動物件偵測會因光源變化的影響而使得偵測的結果品質變差，所以抗光源變化的移動物件偵測演算法因此被提出。抗光源變化的演算法具有高運算量以及高複雜度因而在軟體實現無法達到即時的效果，為加速抗光源變化移動物件偵測演算法，我們在FPGA利用平行運算中管線加速系統運算，以及建立真值表使演算法的複雜度降低，實現VGA解析度的Local binary pattern (LBP) 背景相減，並符合系統的時序限制。在LBP背景相減演算法中計算特徵影像時需要大量的記憶體，對有限資源及頻寬的硬體電路會有資源限制及頻寬限制。我們修正LBP背景相減法的特徵擷取方式降低記憶體資源使用，再利用列緩衝器(Row Buffer)免去計算特徵影像時外部記憶體的讀取。我們在硬體合成工具Quartus II設計特徵擷取方式所使用的暫存記憶體減少84%；利用模擬工具Modelsim 模擬當使用列緩衝器時，於VGA解析度10 fps 的系統可減少115.625MHz外部記憶體頻寬使用。

The light change makes the common moving object detection results poor. Therefore, the against illumination change moving object detection is proposed. Because against light change algorithm has high computation and complexity, so it cannot reach real-time in software. To accelerate the calculation of anti-light change algorithm, we use the parallelism of pipelining to accelerate computing, and establish the truth table to reduce complexity to develop VGA resolution local binary pattern background subtraction (LBPBS) on FPGA. LBPBS needs much memory to calculate feature, for limited resources hardware, it has resource and memory bandwidth constraints. We modify the feature extraction to reduce memory, and use the row buffer to avoid off-chip memory read when calculating feature. We design the feature extraction reducing on-chip memory requirement 84% on hardware synthesis tool Quarutus II; and we reduce 115.625MHz off-chip memory bandwidth with VGA resolution 10 fps system when using row buffers on simulation tool Modelsim.

ABSTRACT(in Chinese) i
ABSTRACT ii
Acknowledgement iii
Contents iv
List of Tables v
List of Figures vi
Chapter 1. Introduction 1
Chapter 2. Related Work 6
2.1. General object detection algorithms 6
2.2. Local Binary Pattern Background Subtraction 9
2.2.1. LBP Transforming 9
2.2.2. LBP Background Modeling 10
2.2.3. Background Match 13
2.2.4. Background Update 14
Chapter 3. LBP Background Building Hardware Architecture 17
3.1. LBP Transforming hardware architecture 17
3.2. LBP Background Modeling hardware architecture 19
Chapter 4. LBPBS Hardware Architecture 24
4.1. Background match hardware architecture 24
4.2. Background update hardware architecture 28
Chapter 5. Algorithm Requirement 30
5.1. Memory requirement 30
5.2. Bandwidth requirement 32
Chapter 6. LBPBS Hardware Simulation 34
6.1. Simulation of LBP Transforming 37
6.2. Simulation of LBP Background Modeling 43
6.3. Simulation of Background match 45
Chapter 7. Conclusions 50
References 51

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