臺灣博碩士論文加值系統

在類比濾波器電路中，相較於主動式RC濾波器、切換式電容濾波器等其他種類的類比濾波器，轉導電容式濾波器更適合被運用在高頻率上。而轉導式運算放大器則是轉導電容式濾波器中最重要的基本元件。對轉導放大器而言，線性度較差是主要的缺點，所以如何改善線性度變成一個很重要的課題。而本論提出改善轉導式運算放大器線性度的架構，可以用來製作高線性度的轉導電容式濾波器轉導。與其他研究文獻相比，也擁有較低的功率消耗。
本論文針對線性度與低耗能兩方面的架構與技術進行討論。第一種電路架構，讓輸入對電晶體操作在飽和區，利用調節疊接組態來固定它們的汲極至源極端跨電壓，並且利用在輸入並聯一組操作在弱反轉區用以補償遷移率，如此有效提高電路的線性度。除了提高線性度，電路還具有調整轉導值的功能，可以補償轉導值因製程誤差所造成的偏移。此轉導放大器以台積電0.18μm CMOS 1P6M 製程實現，使用面積為 。它的工作電壓為1.2V且功率消耗為0.704mW。而第三項諧波失真在輸入訊號頻率40MHz且振幅為0.4Vpp時的大小是-65.23 dB，並且在同樣條件下的三階交互調變為-54 dB。
第二種電路將輸入級設定在弱反轉區路。因為電晶體的弱反轉區特性，可以將電路的電流數值降低，如此達到低耗能的要求，且操作的頻率可以控制在較低的區間，所以可以應用在聲頻相關的用途。除此之外，電路一樣也具有調整轉導值的功能。此轉導放大器以台積電0.18μm CMOS 1P6M 製程實現，使用面積為 。它的工作電壓為1.5V且功率消耗為 。而第三項諧波失真在輸入訊號頻率1kHz且振幅為0.4Vpp時的大小是-47.28dB，並且在同樣條件下的三階交互調變為-38dB。

Compared with the other types of analog filters, such as active-RC or switched-capacitor filters, transconductance-C filters are usually used for high-frequency analog filters. The Operational transconductance amplifier (OTA) is the most important building block in the transconductance-C filters. Poor linearity is the drawback of the OTA. Therefore, it is an important project to improve the linearity of the OTA. In this thesis, two linearity enhancement techniques for OTA to build the transconductance-C filter are proposed. Compared with other papers, these circuits have lower power consumption as well.
This thesis is to discuss both the architecture and technique for linearity and low power consumption. The first circuit architecture has the input transistors operating in the saturation region, uses regulation cascode configuration to fix the drain-source voltage, and add a parallel pair oftransistors operating in weak inversion for compensation mobility so as to effectively improve the linearity of the circuit. In addition to linearity improvement, the circuit further comprising transconductance adjustment function for the compensation of offset caused by the process error. This transconductance amplifier was fabricated by TSMC 0.18μm CMOS 1P6M process with the area of , the operating voltage of 1.2V, and the power consumption of 0.704mW. While the third harmonic distortion with the input frequency is 40MHz and the input amplitude of 0.4Vpp is -65.23 dB, and the third order intermodulation becomes -54 dB under the same conditions.
The input stage of the second circuits set in weak inversion. Because of the weak inversion characteristics of the transistors, the total current consumption can be reduced so as to achieve low energy requirements. The circuit operation is at lower frequency, so it is possible to apply to audio related purposes. In addition, the circuit also has similar transconductance adjustment function. This transconductance amplifier was fabricated by TSMC 0.18μm CMOS 1P6M process with the area of , the working voltage of 1.5V, and the power consumption . While the third harmonic distortion with the input signal frequency is 1kHz and the amplitude of 0.4Vpp when size is -47.28dB, the third-order intermodulation becomes -38dB under the same conditions.

第一章 緒論 1
1.1 動機 1
1.2 應用 2
1.3 電路設計流程 3
1.4 論文概述 4
第二章 轉導式運算放大器 5
2.1 簡介 5
2.2 轉導式運算放大器的基本架構 6
2.2.1 全差動輸入對 6
2.2.2 源極退化差動輸入對 9
2.2.3 偽差動輸入對 11
2.2.4 操作在三極區與固定汲極-源極跨壓之偽差動輸入對 14
2.2.5 浮置閘極的轉導器 16
2.2.6 使用電壓隨耦器的源極退化差動對 17
2.2.7 並聯式差動對 19
第三章 遷移率補償技術 20
3.1 簡介 20
3.2 使用弱反轉區補償三極區的遷移率降低 21
3.3 使用弱反轉區補償飽和區的遷移率降低 24
3.4 使用三極區補償飽和區的遷移率降低 26
第四章 高線性度之轉導式運算放大器 28
4.1 簡介 28
4.2 使用調節疊接組態之低功耗與高線性的轉導式運算放大器 29
4.2.1 轉導式運算放大器架構與原理介紹 29
4.2.2 共模回授電路與共模前授電路 35
4.3 使用遷移率補償之高速度與高線性度的轉導式運算放大器 38
4.3.1 轉導式運算放大器架構與原理介紹 38
4.3.2 共模回授電路與共模前授電路 41
第五章 模擬與量測結果 42
5.1 簡介 42
5.1.1 共模排斥比 42
5.1.2 電源排斥比 42
5.1.3 總諧波失真 43
5.1.4 第三項諧波失真 43
5.1.5 三階交互調變 44
5.1.6 功率消耗 46
5.2 使用調節疊接組態之低功耗與高線性的轉導式運算放大器的效能 47
5.2.1 模擬結果 47
5.2.2 電路佈局與量測結果 50
5.2.3 效能總結與比較 55
5.3使用遷移率補償之高速度與高線性度的轉導式運算放大器的效能 58
5.3.1 模擬結果 58
5.3.2 電路佈局與量測結果 60
5.3.3 效能總結與比較 67
第六章 結論 69
6.1 結論 69
6.2 未來發展 70
參考文獻 71

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