臺灣博碩士論文加值系統

本論文首先於本章介紹研究之動機，第二章詳述由接地反彈雜訊(Ground Bounce Noise)的生成與傳播方式，以及現行分析及解決問題的方法。於第三章中說明並由裸板及目前PCB拓樸Trace Layout電路板做比較，由實測與模擬結果比較驗證抑制接地彈跳雜訊的效果，並提出一些優缺點比較。
第四章將數值模擬的結果與實驗比較，測試模擬程式於各種不同的拓樸幾何結構下之影響，再討論各組數據所隱含的物理意義。
第五章整理抵制雜訊傳播的方法，討論目前拓樸架構方法與傳統方法間的差異與優缺點，第六章並作成結論。本論文最後整理多層印刷電路板抵制雜訊傳播的方法及接地拓樸結構與彈跳雜訊抑制新方法與傳統方法的差異。現今IC的上升時間已經很短並將更短，尤其是在電源開啟後的重置信號(Reset Signal)的完整性的重要，本文討論的技術對解決EMI屏蔽和信號的相互干擾問題是必不可少的。

This thesis presents the Multi-Layer PCB Ground Planes Topology and Bounce Noise suppressing theory which motive study and research on chapter 1, chapter 2 is the grounding bounce of the miscellaneous signal to detail (Ground Bounce Noise) Formulation and the circulation way, and it is the current to analyse and can not solve by method of this kind problems. Prove with PCB open up Topology Trace Layout circuit board make and compare at present by naked circuit in chapter 3, survey with simulation result is it suppress grounding bounce miscellaneous result of new way to prove relatively, propose some pluses and minuses are compared.
Chapter 4 compare result of the numerical simulation with experiment, test simulation procedure open up topology geometry influence of structure on all kinds of it and then discuss the implicit physics meaning of all groups of data.
Chapter 5 put the method of resisting the miscellaneous new spreading in order, discussion open up topology structure method and difference and pluses and minuses of traditional method at present, do it into a conclusion. Thesis this put in order multi-layer printed circuit board resistance miscellaneous method and ground that new travel open up structure topology with bounce miscellaneous signal suppress finally difference of new method and traditional method.

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簽名頁
授權書 ．．．．．．．．．．．．．．．．．．．．．．．．iii
中文摘要 ．．．．．．．．．．．．．．．．．．．．．．．iv
英文摘要 ．．．．．．．．．．．．．．．．．．．．．．．v
誌謝 ．．．．．．．．．．．．．．．．．．．．．．．．．vi
目錄 ．．．．．．．．．．．．．．．．．．．．．．．．．vii
圖目錄 ．．．．．．．．．．．．．．．．．．．．．．．．ix
第一章 緒論．．．．．．．．．．．．．．．．．．．．．．1
1.1 研究動機．．．．．．．．．．．．．．．．．．．．．1
1.2 研究目標．．．．．．．．．．．．．．．．．．．．．2
1.3 章節摘要．．．．．．．．．．．．．．．．．．．．．3
第二章 訊號的分析．．．．．．．．．．．．．．．．．．．5
2.1 反彈雜訊的訊號分析．．．．．．．．．．．．．．．．5
2.2 共振問題．．．．．．．．．．．．．．．．．．．．．13
2.3 傳統數值分析方法．．．．．．．．．．．．．．．．．14
2.3.1 時域有限差分法．．．．．．．．．．．．．．．．．14
2.3.2 混合電位積分方程式法．．．．．．．．．．．．．．16
第三章 接地彈跳雜訊電源平面的影響．．．．．．．．．．．18
3.1接地彈跳雜訊效應．．．．．．．．．．．．．．．．．．18
3.2 電源平面切割結構．．．．．．．．．．．．．．．．．19
3.3 模擬與量測方法．．．．．．．．．．．．．．．．．．21
3.3.1 電磁輻射量測環境及方法．．．．．．．．．．．．22
3.4 切割電源平面對電源品質的影響．．．．．．．．．．24
3.5 模態電流 ．．．．．．．．．．．．．．．．．．．．27
第四章 FDTD 模擬主動元件．．．．．．．．．．．．．．35
4.1 高頻主動元件訊號品質與電磁輻射．．．．．．．．．35
4.2 理論分析．．．．．．．．．．．．．．．．．．．．35
4.2.1 理論分析介紹．．．．．．．．．．．．．．．．35
4.2.2 等效電壓源法．．．．．．．．．．．．．．．．．38
4.3 模擬主動元件．．．．．．．．．．．．．．．．．．41
4.3.1 雙載子電晶體．．．．．．．．．．．．．．．．．42
4.3.2 雙載子電晶體模擬結果．．．．．．．．．．．．．44
4.3.3 場效電晶體(FET) ．．．．．．．．．．．．．．．45
4.3.4 互補場效電晶體反向器．．．．．．．．．．．．．49
4.4 CMOS 元件接地彈跳雜訊模擬．．．．．．．．．．．53
第五章 結論．．．．．．．．．．．．．．．．．．．．56
參考文獻．．．．．．．．．．．．．．．．．．．．．．57

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