臺灣博碩士論文加值系統

在有限的電力中，節省電源使用與增加電源利用效率，已成為開發電源外另一項重要工作。而功率因數的改善能夠充分利用電源的設備容量、降低峰值電流及諧波成分，與增加電源的使用效率。
目前大多數的電子產品都必使用直流電源，因此將交流電源轉為直流電源的轉換器扮演著重要的角色。以往的三相橋式整流器會產生畸變電流，而且功率因數很低，造成電力的浪費與損失，另外其電流中的諧波成份會回流到電力系統產生干擾。而傳統被動式功率因數校正的三相電源架構，需要在輸出側(負載前)加上大量的電感和電容，由於特性不佳及體積大、重量重，已不符合現在電源供應器的高電力密度(High Power Density)需求，在今日流行輕薄短小的電子電路時代，顯得很不實用。另一方面，在主動式功率因數校正電路架構中，使用六個晶體開關的功率因數校正之架構可改善功率因數，提供良好的特性，但控制電路過於複雜，且成本太高，因此產品不具競爭力。
本論文之目的在設計一高效率、高功率因數及低成本的三相整流器。應用不連續的波寬調變技術，設計一個單一晶體三相升壓型截波器，使輸入電流波形自動隨著輸入電壓波形變化，達成高功率因數。此整流器之電流操作在不連續模式，因此減少升壓二極體的恢復時間損失，達到高效率的應用；另一方面，由於僅使用一個功率晶體，可降低成本。由於傳統的單一晶體之三相功率因數校正電路使用在5KW到10KW時，五次諧波有偏高之現象，造成總諧波失真較高，無法符合國際規範IEC 555-2。雖然有許多參考文獻提出改善的方法，但改善效果不佳，所以本論文以注入新的補償訊號方式，以達到高功率因數且降低總諧波失真之目的。

Switching rectifiers with power factor correction (PFC) circuits have given considerable attention due to the increasing demand of power quality improvement. The demands of power quality improvement include unity power factor and high efficiency. Moreover, high power density and low cost are also very important in industrial applications.
The traditional three-phase diode bridge, which is followed by a relatively large L-C filter at the load side, suffers from high content of low order harmonics in supply currents, high dc voltage ripple, low power density with large size of reactive components and improvement of input power factor in narrow operating region. On the other hand, the PFC with six-switch full-bridge topologies can provide excellent performance but needs complicated control with relatively high cost for large number of switches. Therefore, the applications of the PFC with six-switch full-bridge topologies are not popular in industry.
A low-cost single-switch three-phase rectifier with PFC has recently attracted significant interest due to its simplicity. In this thesis, a single-switch three-phase boost rectifier with high power factor, which is operated in discontinuous current mode (DCM) pulse-width-modulation (PWM) with constant switching frequency and variable on-time, is proposed for the design of switching power supplies. The major advantages of this rectifier are that its input current waveform automatically follows the input-voltage waveform, and it can achieve extremely high efficiency because the reverse-recovery-related losses of the boost diodes are eliminated. However, if the rectifier is implemented with the conventional low-bandwidth, output-voltage feedback control at a constant switching frequency, the rectifier input current exhibits a relatively large 5th-order harmonic. Thus, a single-switch three phases boost rectifier cannot be pushed into high power levels due to high total harmonic distortion (THD). As a result, at power levels above 5KW and below 10KW, the 5th-order harmonic imposes sever design, performance and cost trade-offs in order to meet the maximum permissible harmonic-current levels defined by the IEC 555-2 document. Recently, a number of control techniques have been introduced to improve the THD but with low efficiency and complicated control. Therefore, the inject signal method is proposed in this thesis to reduce the THD in order to meet the IEC 555-2 standard.

中文摘要 ………………………………………………………………Ⅰ
英文摘要 ………………………………………………………………Ⅲ
誌 謝 ………………………………………………………………Ⅴ
目 錄 ………………………………………………………………Ⅵ
圖 目 錄 ………………………………………………………………Ⅷ
表 目 錄 ……………………………………………………………ⅩⅡ
第一章 緒論 …………………………………………………………1
1.1 動機 …………………………………………………………1
1.2 相關文獻概況 ………………………………………………3
1.3 本論文之成果 …………………………………..…………4
1.4 本論文內容概述 ……………………………………………4
第二章 理論基礎 ……………………………………………………6
2.1 單相功率因數校正電路之研究與分析………………………6
2.2 三相功率因數校正電路之研究與分析 ……………………16
2.2.1 三相被動式功率因數校正整流方式 ……………………17
2.2.2 三相主動式功率因數校正整流方式 ……………………17
2.3 三相單晶主動式功率因數校正電路之分析……………… 23
2.4 發展三相單晶主動式功率因數校正電路之補償架構 ……30
2.5 三相單晶主動式功率因數校正電路之模擬 ………………35
第三章 單相主動式功率因數校正電路之實作 ……………………39
3.1 電力電子電路之製作 …………………..…………………39
3.2 迴授控制電路之製作 ………………………………………43
3.3 實驗結果 ……………………………………………………44
第四章 傳統三相單晶主動式功率因數校正電路之實作 …………50
4.1 電力電子電路之製作 ………………………………………50
4.2 電壓迴授控制電路之製作 …………………………………55
4.3 輔助電源及驅動電路的製作 ………………………………56
4.4 實驗結果 ……………………………………………………57
第五章 結合注入補償訊號之三相單晶主動式功率因數校正電路之模擬與
實作 …………………………………………………………64
5.1 補償架構之分析 ……………………………………………64
5.2 補償架構之模擬 ……………………………………………72
5.3 補償電路之製作 ……….………………………………….75
5.4 實驗結果 ……………………………………………………81
第六章 結論……….…………………………………………………88
參考文獻 ……………………………………………………………91
個人簡歷 ……………………………………………………………99

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