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研究生:Ashif Aminulloh Fathnan
研究生(外文):Ashif Aminulloh Fathnan
論文名稱:Numerical Simulation and Analytical Calculation of Deep Trench Capacitor for RF Application
論文名稱(外文):Numerical Simulation and Analytical Calculation of Deep Trench Capacitor for RF Application
指導教授:楊紹明
指導教授(外文):Yang Shao-Ming
口試委員:簡鳳佐許健楊紹明
口試委員(外文):Chien Feng TsoSheu GeneYang Shao-Ming
口試日期:2013-05-27
學位類別:碩士
校院名稱:亞洲大學
系所名稱:資訊工程學系碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:英文
論文頁數:41
中文關鍵詞:Capacitorsequivalent circuitssemiconductor device modelinganalytical models
外文關鍵詞:Capacitorsequivalent circuitssemiconductor device modelinganalytical models
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In this thesis, an analytical model of y-parameters for trench capacitors devices in radio frequency application is presented. Based on the 2D and 3D poisson’s solution, the model gives the closed form solutions of the potential and electrical field distributions as a function of the structure parameters and top electrode bias; dependence of equivalent series resistance on current path length of top electrode with various device parameters are simulated. An effectual way to gain the optimum high-capacitance and low series resistance devices is also proposed. All analytical results are well verified by simulation results obtained by TCAD Sentaurus and previous experimental data.
In this thesis, an analytical model of y-parameters for trench capacitors devices in radio frequency application is presented. Based on the 2D and 3D poisson’s solution, the model gives the closed form solutions of the potential and electrical field distributions as a function of the structure parameters and top electrode bias; dependence of equivalent series resistance on current path length of top electrode with various device parameters are simulated. An effectual way to gain the optimum high-capacitance and low series resistance devices is also proposed. All analytical results are well verified by simulation results obtained by TCAD Sentaurus and previous experimental data.
DEDICATION iii
ABSTRACT iv
ACKNOWLEDGEMENT v
TABLE OF CONTENT vii
LIST OF FIGURES viii
INTRODUCTION 1
1.1 Backround 1
1.2 Motivation 3
1.3 Thesis Outline 5
DEEP TRENCH CAPACITOR 6
2.1 Capacitor 6
2.1.1 Properties of Capacitors 6
2.1.2 Types of Capacitors 8
2.2 Deep Trench Capacitor 13
2.3 Deep Reactive Ion Etching 13
NUMERICAL SIMULATION AND ANALYTICAL CALCULATION 18
3.1 Device Structure Description 19
3.2 Equivalent Circuit And Analytical Calculation 20
3.3 Result and Discussion 22
NOVEL STRUCTURE OF DEEP TRENCH CAPACITOR 28
4.1 Introduction 28
4.2 Device Structure Description 31
4.3 Device Performance and Characterization 33
4.3.1 DC Characteristics 33
4.3.2 RF Characteristics 35
CONCLUSION 38
References 39

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[2]R. R. Tummala, “Introduction to system-on-package (SOP) miniaturization of the entire system”. New York :: McGraw-Hill, 2008.
[3]Amethystna, Surya Kris “Reliability Study on 5V BCD CMOS Device: New PMOS-NBTI Characterization and HCI Assessment on Bend Gate Structure” Master Theses, Computer Science and Information Engineering, Asia University Taiwan, May 2012
[4]S. Decoutere, G. Carchon, M. Dehan, A. Mercha, “Passive on-chip Components: Trends and challenges for RF applications,” Microelectronic Engineering 82(2005) p503
[5]Ban P. Wong et al, “Nano-CMOS Circuit and Physical Design”. Wiley-Interscience 2005
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[7]Trond Ytterdal et al “Device Modeling for Analog and RF CMOS Circuit Design,” John Wiley & Sons, 2003
[8]Kevni Buyuktas, Angelika Geiselbrechtinger, Stefan Decker and Klaus Koller, “Simulation and modelling of a high-performance trench capacitor for RF applications,” Semicond. Sci. Technol. 24 (2009) 075007 (10pp)
[9]Will Z. Cai, Sudhama Shastri, Gordy Grivna, Yujing Wu, and Gary Loechelt. “RF Characteristics of a High-Performance, 10-fF/μm2 Capacitor in a Deep Trench,” IEEE Electron Device Letters, Vol. 25, No. 7, July 2004, pp.468-470
[10]Marion K. Matters-Kammerer, K. B. Jinesh, Theo G. S. M. Rijks, Fred Roozeboom, and Johan H. Klootwijk “Characterization and Modeling of Atomic Layer Deposited High-Density Trench Capacitors in Silicon,” IEEE Transactions on Semiconductor Manufacturing, Vol. 25, No. 2, May 2012, pp.247
[11]Hastings, Alan “The Art of Analog Layout” Prentice Hall Inc., New Jersey 2001
[12]Rao Y., Ogitani S., Kohl P., et al., “Novel polymer-ceramic nanocomposite based on high dielectric constant epoxy formula for embedded capacitor application”, Journal of Applied Polymer Science, vol. 83, Issue 5, pp. 1084-1090, Jan. 31, 2002
[13]Allen, Phillip E. “CMOS Analog IC Design, Lecture 060: Capacitors” http://www.aicdesign.org/SCNOTES/2010notes/Lect2UP060_(100324).pdf, downloaded: May 2013
[14]Ling-Hsu Tsang, De-Yuan Wu (United Microelectronics Corp.) “Method of fabricating a deep trench capacitor” United States Patent, US 6326261 B1, Dec. 4, 2001
[15]Laermer, Franz; Schilp, Andrea "Method of anisotropically etching silicon" United States Patent 5501893, March 26, 1996
[16]Kolesnikov-Jessop, Sonia (23 November 2012). "Precise Future of Silicon Parts Still Being Debated". The New York Times (New York).
[17]Yeom, Junghoon; Wu, Yan; Selby, John C.; Shannon, Mark A. (31 October 2005). "Maximum achievable aspect ratio in deep reactive ion etching of silicon due to aspect ratio dependent transport and the microloading effect". J. Vac. Sci. Technol. B.
[18]Johari, H., Ayazi, F “High-Density Embedded Deep Trench Capacitors in Silicon With Enhanced Breakdown Voltage” IEEE Transactions on Components and Packaging Technologies, , Issue: 4 2009, pp: 808 – 815
[19]Jayaraman, B., Gupta, S., et al “Performance analysis and modeling of deep trench decoupling capacitor for 32 nm high-performance SOI processors and beyond” IEEE International Conference on IC Design & Technology (ICICDT), 2012 pp: 1 - 4
[20]Ka Nang Leung, et al. “Capacitor-Free CMOS Low-Dropout Regulator With Damping-Factor-Control Frequency Compensation “ IEEE Journal of Solid-State Circuits, Vol. 38, No. 10, October 2003
[21]Glenn Morita “Low Dropout Regulators—Why the Choice of Bypass Capacitor Matters” Analog Dialogue 45-01 Back Burner, January 2011

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