臺灣博碩士論文加值系統

隨著越來越複雜的多媒體應用程式的發展，嵌入式平台上的處理器能力也越來越受重視，最近的多處理器嵌入式平台已經從原本的數位訊號處理器(DSP)，轉移到對稱式多處理器架構。然而，在嵌入式即時作業系統 uC/OS-II 上卻不支援多核心架構。在這篇論文裡，我們在 uC/OS-II 上加入了一個 SMP 模組。透過這個模組，可以讓作業系統提升整體工作處理量以增進效能。同時，我們也提出了兩種不同的 SMP 模組實作方式，並且根據不同的嵌入式系統開發條件下，例如產品開發時程、應用程式的即時性、系統中記憶體的多寡等，給予不同方式的使用建議。

As the applications becoming complex, the requirements for computing power
have become more critical. The embedded platform development has shifted
attention from a focus on Digital Signal Processor(DSP) support to SMP archi-
tecture. Most researches focus on improving the performance of applications at
algorithm or compiler level on multiprocessor. However, scheduling is also one
of the most important roles in improving the performance on multiprocessor
system. In this thesis, we propose an SMP module to allow easy integration
with a real-time embedded operating system μC/OS-II. With this modulized
SMP design, μC/OS-II could utilize resource efficiently on x86 multiprocessor
machine easily. We adopt two different task queue implementations, shared
task queue and independent task queues, to achieve flexible configuration for
different situations. For shared task queue, all processors access the same task
queue and it is suitable for more real-time demand, less memory space, and
shorter development time. For independent task queues, each processor has
their own task queue, this method is suitable when there are both real-time
tasks and non-real-time tasks in the system, and it is more efficient in general.
Our implementation shows that such flexibility of our SMP module in support-
ing μC/OS-II on multiprocessor system is quite beneficial.

1 Introduction 1
2 Background 4
2.1 μC/OS-II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.2 Task Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.3 Scheduler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 SMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Implementation 15
3.1 Porting to x86 Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1 Real Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.2 Protected Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1.3 Source Code Revising . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2 Multicore Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2.1 PIC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.2.2 Virtual Wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2.3 APIC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.2.4 MP Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.3 Scheduler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4 Experiments and Results 41
4.1 Experiment Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.2 Unfair CPU Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.3 Shared Task Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
i
4.4 Independent Task Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5 Conclusion and Future Work 54
Bibliography 55

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