臺灣博碩士論文加值系統

由於積體電路科技的發展和醫學上的進步，人類對各種生理訊號有更進一步的了解，並且讓微小的電子醫療元件得以實現。在現今脊髓手術過程有術中監測系統，為了避免手術誤損重要神經以致半身不遂。在這些生理訊號的截取當中，類比前端放大器扮演非常重要的角色，需要能夠放大神經訊號並且減少雜訊的干擾，本篇論文主要針對脊髓神經訊號(ENG)進行量測，由於此神經訊號擁有低頻率低振幅的特性，容易受到電子元件內的閃爍雜訊影響，本篇論文使用截波調變技術來降低閃爍雜訊的干擾，並且為了降低截波調變技術產生的直流偏壓和調變雜訊等副作用，使用額外輔助電路來降低這些不理想特性，整個類比前端放大器與一已設計好的十位元差量調變逐次漸進式類比數位轉換器整合成一個類比前端系統。此系統包含四個低雜訊前端放大器、四個可程式增益放大器、一個四通道多功器、一個轉阻放大器和一個類比數位轉換器。高頻截止頻率為5K Hz，低頻截止頻率為100Hz，雜訊效率因子(NEF)為4.06，整個類比前端放大器增益為60-80dB，並有很高的線性度，功率消耗為168μW。整體類比前端的功率消耗為191.84μW,平均每個通道所消耗的功率為47.96μW，在台灣積體電路製造股份有限公司與國家晶片系統中心的幫助下，此類比前端電路晶片將以 0.18 微米製程實現。

This paper presents a 4-channel analog front-end (AFE) acquisition circuit for neural recording systems. It consists of a 4 channel analog front-end amplifier (AFEA) and 500 KS/s 10b ADC. The AFEA consists 4 analog front-end blocks, a 4-to-1 multiplexer, a trans-impedance amplifier (TIA). Each of the analog blocks in AFEA is implemented a capacitively coupled chopper instrumentation amplifier (CCCIA) and a programmable transconductance gain amplifier (PTGA). It is designed for amplification, filtering, and converting to digital signals of biopotential signals, these biopotential signals have the characteristics of small amplitudes and low frequency.
The AFEA acquisition circuit which is fabricated in TSMC 0.18μm CMOS process can adjust gain at three steps (60/68/78dB), the high-pass corner can achieve as low as 100Hz and low-pass corner can achieve 5KHz. The input-referred noise of the AFEA is 1.86μVrms. The noise efficiency factor is 4.06 of CCCIA. The whole AFE acquisition circuit power consumption is 191.84μW where 47.96μW per channel.

摘要 ................................ ................................ ............................... II
Abstract ................................ ................................ ........................ III
Acknowledgements ................................ ................................ ...... IV
Contents ................................ ................................ ........................ V
Figure Captions ................................ ................................ .......... VII
Table Captions ................................ ................................ ................................ .............. X
Chapter1 Introduction ................................ ................................ ................................ .... 1
1.1 Background ..................................................................................................................... 1
1.2 Review on Analog Front-End Amplifiers ....................................................................... 4
1.3 Motivation ..................................................................................................................... 10
1.4 Main Results and Thesis Organization .......................................................................... 11
Chapter2 Circuit Design and Simulation Results ................................ ........................ 12
2.1 Design Consideration .................................................................................................... 13
2.2.1 Capacitively Coupled Chopper Instrumentation Amplifier (CCCIA) .................... 16
2.2.2 Programmable Transconductance Gain Amplifier(PTGA) and Multiplexer[6] ..... 30
2.2.3 Transimpedance Amplifier (TIA) [6] ..................................................................... 32
2.2.4 A Rail to Rail Input/Output Buffer[14] .................................................................. 35
2.2.5 A 10b Delta-Modulated SARADC [15] ................................................................. 36
2.3 Post-Simulation Results................................................................................................. 40
Chapter 3 Experimental Results................................ ................................ ................... 45
3.1 Chip Layout Descriptions .............................................................................................. 45
3.2.1 Measurement Setup .................................................................................................... 46
3.2.2 Measurement Results.................................................................................................. 53
3.2.3 Commercial Instrument Measurement Results ........................................................... 63
3.2.4 Experimental Results .................................................................................................. 66
3.3 Discussion of AFE acquisition circuit ........................................................................... 68
Chapter 4 Conclusions and Future Work ................................ ................................ ..... 70
VI
4.1 Conclusions ................................................................................................................... 70
4.2 Future Work .................................................................................................................. 71
References ................................ ................................ ................................ .................... 72
Appendix ................................ ................................ ................................ ...................... 74
Affidavit of Approval of Animal Use Protocol ................................................................... 74

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