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研究生:陳冠州
研究生(外文):Guan-Zhou Chen
論文名稱:以SOPC實現位元平面概念改良式階層樹集合分割編解碼演算法
論文名稱(外文):SOPC Implementation of a Bit-plane based Modified SPIHT Algorithm for 1-D Wavelet Coefficients Coding
指導教授:洪金車
學位類別:碩士
校院名稱:國立高雄第一科技大學
系所名稱:電腦與通訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2013
畢業學年度:101
語文別:中文
論文頁數:98
中文關鍵詞:心電圖壓縮離散小波轉換SPIHTSOPC
外文關鍵詞:Discrete wavelet transformECG Compression systemSPIHTSOPC
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階層樹集合分割演算法(Set Partitioning in Hierarchical Tree, SPIHT)是一種對小波轉換係數很有效率的編碼法,可提供失真與無失真的資料壓縮。
原始SPIHT演算法需要大量的記憶體支援以及耗費大量的運算時間,十分不利於即時的應用和硬體實現。為了克服這兩個問題,一改良型階層樹集合分割編解碼演算法(MSPIHT)已被提出。它採用位元平面(Bit-plane)輸入方式,以旗標陣列(Flag Array)取代傳統SPIHT演算法所使用的列表(List),可有效地改善記憶體需求過大的問題。此外,在編碼流程中亦也將三個列表(LIP、LSP、LIS)的處理流程加以整合,減少列表個別執行處理所耗費的時間。並使用檢查碼(Check Bit)的概念來降低編碼流程中,搜尋後代係數所需之時間。此改良型SPIHT編解碼演算法更具模組化和規律性,可使得編碼流程和編碼時間更加快速且穩定。
本論文藉由ALTERA DE2-115開發平台,以可程式化系統單晶片(SOPC)方式實現此改良型SPIHT演算法,除了功能驗證外亦探討其效能。實驗結果顯示此改良型SPIHT演算法相較於傳統方法,在不同壓縮率下編碼速度提升約70~90倍,並節省了40%記憶體需求。
The SPIHT scheme can be very efficient for data inherent in hierarchical self similarities. However, this scheme which exploited the self similarities in terms of dynamic data structures, imposed practical limitation on hardware implementation, especially for large-size data sequences. A Modified Set Partitioning In Hierarchical Trees (MSPIHT) Algorithm was proposed for solving these problems. Different from SPIHT, the MSPIHT used the Bit-Plane and flag concepts, which can reduce memory requirements and speed up the coding process. Besides, three lists in SPIHT coding process: LIP, LSP, and LIS were combined into one step to simplify the complexity of MSPIHT coding process. The searching time of descendant coefficient was also reduced by using Check Bit. Comparing with SPIHT, MSPIHT had more regular coding process, lower coding complexity, and shorter coding time.
In this study, we utilized ALTERA DE2-115 as a platform to implement MSPIHT coding by using SOPC. According to the experiment result, the hardware could be exactly implemented. Furthermore, MSPIHT encoding process was 70-90 times faster than SPIHT, and reduced 40% memory requirement.
摘要 I
ABSTRACT II
誌謝 III
目錄 IV
表目錄 VI
圖目錄 VII
第一章 緒論 1
1-1 研究動機與目的 2
1-2 應用於心電圖之資料壓縮方法探討 3
1-3 研究方法 3
1-4 實驗設備 4
1-5 論文架構 5
第二章 小波轉換理論與心電圖壓縮系統 6
2-1 小波轉換 6
2-2 一維遞迴式離散周期性小波轉換(1-D DPWT) 7
2-3 一維非遞迴式離散周期性小波轉換(1-D NRDPWT) 10
2-4 心電圖壓縮系統 18
2-4-1 基於傳統小波轉換的心電圖壓縮系統 18
2-4-2 基於RRO-NRDPWT的心電圖壓縮系統 19
第三章 SPIHT壓縮編碼演算法 21
3-1 壓縮編碼 21
3-2 SPIHT壓縮編碼概述 22
3-3 SPIHT編碼演算法 24
3-4 SPIHT編碼流程 32
第四章 改良式SPIHT編碼演算法 42
4-1 SPIHT編碼之特性分析 42
4-2 MODIFIED SPIHT編碼演算法 47
4-3 MSPIHT編碼流程 57
第五章 系統架構及設計 63
5-1 開發背景 63
5-2 SOPC 64
5-3 開發流程工具 65
5-4 NIOS II微處理器 69
5-5 SOPC開發流程 70
5-6 系統架構 75
5-7 系統流程 76
第六章 實驗結果與分析 77
6-1 SPIHT硬體實現研究方式 77
6-2 SPIHT實驗結果分析 79
第七章 結論 84
7-1 結論 84
參考文獻 85
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