臺灣博碩士論文加值系統

過去為了提升執行效能，提升處理器執行頻率為主要設計方法之一。但是當處理器處於閒置狀態時若仍維持高頻率運行則會造成功耗的浪費。因此動態電壓頻率調整(DVFS, Dynamic Voltage and Frequency Scaling)機制被提出且廣泛的使用在節省處理器發生閒置時浪費功耗上。
處理器閒置的情況有兩種，處理器工作量少以及快取失誤發生需要到記憶體做存取的情況。前者已經有許多研究討論並解決，但快取失誤造成處理器閒置功耗浪費的問題較少有研究利用調頻來改善功耗損失的問題。但是在節省功耗及執行效能上要如何去作取捨也是需要考量的重點之一。因此我們提出的方法中主要是針對一般使用者需求，在功耗及效能中取平衡，透過使用DVFS機制來決策對處理器最適合的執行頻率。
隨著使用者對電腦系統效能上的需求，處理器上執行的工作也越來越多，多核心系統架構被提出使用來提升執行效能。DVFS機制也在多核心系統上廣泛使用於節省功耗上。但是在多核心系統上多顆核心同時在執行工作，當快取失誤同時發生時可能造成記憶體競爭的問題。記憶體競爭發生時，會導致各核心資料處理時間延遲增加而造成效能下降且影響功耗，因此本篇論文提出利用DVFS機制去改善記憶體競爭發生，同時改善執行效能及決策一個理想執行頻率來節省功耗。

目錄
誌謝 i
摘要 ii
Abstract iii
目錄 iv
圖目錄 v
表目錄 vi
第一章 緒論 1
1.1 前言 1
1.2 研究動機 2
1.3 研究目標 3
1.4 論文架構 3
第二章 相關研究 4
2.1 DVFS 基本架構介紹 4
2.2 處理器閒置問題 5
2.3 調節頻率的影響 6
2.4 DVFS相關研究論文 6
第三章 快取失誤之省電機制 8
3.1 基本系統架構 8
3.2 公式定義 9
3.3 理想頻率分析 10
3.4 改善記憶體競爭造成的功耗損失 11
第四章 模擬結果與分析 15
第五章 結論 18
參考文獻 19

[1]Christine Mayap Kamga, “CPU frequency emulation based on DVFS,” IEEE/ACM Fifth International Conference on Utility and Cloud Computing, pp.367-374, Nov.2012.
[2]Camponogara, Eduardo; Lima, George; Mosse, Daniel; Nassiffe, Riad, “Optimizing QoS in Adaptive Real-Time Systems with Energy Constraint Varying CPU Frequency,” III Brazilian Symposium on Computing Systems Engineering (SBESC), pp.101-106, Dec. 2013.
[3]Qian Diao; Justin Song, “Prediction of CPU Idle-Busy Activity Pattern,” IEEE 14th International Symposium on High Performance Computer Architecture, pp.27-36, Feb. 2008.
[4]Mu-Kai Huang J.; Morris Chang; Wei-Mei Chen, “Grouping-Based Dynamic Power Management for Multi-Threaded Programs in Chip-Multiprocessors,” CSE &;#39;09. International Conference on International Conference on Computational Science and Engineering, CSE, pp.29-31, Aug. 2009.
[5]Ionut Anghel; Tudor Cioara; Ioan Salomie; Georgiana Copil; Daniel Moldovan; Cristina Pop, “Dynamic frequency scaling algorithms for improving the CPU&;#39;s energy efficiency,” IEEE International Conference on Intelligent Computer Communication and Processing (ICCP), pp.485-491, Aug. 2011.
[6]Wen-Yew Liang; Shih-Chang Chen; Yang-Lang Chang; Jyh-Perng Fang, “Memory-aware Dynamic Voltage and Frequency Prediction for Portable Devices,” IEEE 14th International Conference on Embedded and Real-Time Computing Systems and Applications(RTCSA), pp229-236, Aug. 2008.
[7]Wen-YewLiang; Yen-Lin Chen; Ming-Feng Chang, “A Memory-aware Energy Saving Algorithm with Performance Consideration for Battery-enabled Embedded Systems,” IEEE 15th International Symposium on Consumer Electronics (ISCE), pp.547-551, June. 2011.
[8]Ouni, B.; Belleudy, C. ; Ben Rekhissa, H. ; Senn, E., “Energy leakage in low power embedded operating systems using DVFS policy,” IEEE Faible Tension Faible Consommation (FTFC), pp.1-4, June. 2012.
[9]Intel® PXA27x Processor Family.
http://www.penguin.cz/~utx/zaurus/datasheets/CPU/28000402.pdf
[10]Enomoto, T.; Kobayashi, N., “A low power multimedia processor implementing dynamic voltage and frequency scaling technique,” 18th Asia and South Pacific Design Automation Conference (ASP-DAC), pp.75-76, Jan. 2013.
[11]Longhao Shu; Xi Li, “Temperature-aware energy minimization technique through dynamic voltage frequency scaling for embedded systems,” 2nd International Conference on Education Technology and Computer (ICETC), Vol.2, pp.515-519, June 2010.
[12]Gangyong Jia; Xi Li; Chao Wang; Xuehai Zhou; Zongwei Zhu, “Frequency Affinity: Analyzing and Maximizing Power Efficiency in Multi-core Systems,” IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, pp.495-497, Aug. 2012.
[13]Congfeng Jiang, “System Level Power Characterization of Multi-core Computers with Dynamic Frequency Scaling Support,” IEEE International Conference on Cluster Computing Workshops, pp.73-79, Sept. 2012
[14]Yiqiang Ding; Wei Zhang, “Loop-Based Instruction Prefetching to Reduce the Worst-Case Execution Time, “ IEEE Transactions on Computers, Vol.59, No.6, June2010.
[15]Jongeun Lee; Aviral Shrivastava, “PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems,” ACM Transactions on Embedded Computing Systems, Vol.11, No.26, July 2010.
[16]Jae-Beom Lee; Myoung-Jin Kim; Sungroh Yoon; Eui-Young Chung, “Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications, ” IEEE Transactions on Computer, Vol.61, No.9, pp.1256-1269, Sept. 2012.
[17]Zoni, D.; Flich, J. ; Fornaciari, W., “Adaptive routing and Dynamic Frequency Scaling for NoC power-performance optimizations,” 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp.231-234, Sept. 2013.
[18]Magnusson, P.S.; Christensson, M., Eskilson, J.; Forsgren, D.; Hallberg G.; Hogberg, J.; Larsson, F.; Moestedt, A.; Werner, B., “Simics: A Full System Simulation Platform, “IEEE Computers , Vol.35, Issue 2, pp.50-58, February 2010.