臺灣博碩士論文加值系統

陣列探針式儲存系統是實現下一代高密度儲存的有效解決方案，然而如何使探針精確定位與其誤差補償，乃實現陣列探針式儲存系統之關鍵問題。本文提出以標準CMOS製程實現一雙軸壓阻式探針，藉由探針結構設計可有效同步偵測垂直與水平位移訊號而達到精確循軌之目的，且不需晶片間之封裝，可直接整合於積體電路以提昇高性能單晶片儲存系統之應用可行性。本文之雙軸壓阻式探針結合前段三角樑與後段肋樑，藉由前後段結構剛性設計可有效降低垂直與水平訊號之耦合，訊號以埋藏之壓阻感測器經由全惠思同電橋輸出。探針尺寸參數設計利用有限元素分析軟體ANSYS模擬，探針前段長70μm後段長235μm並埋藏9.5kΩ多晶矽壓阻，且探針在垂直1.16N/m和水平2N/m之適度剛性可避免磨損儲存媒體，並具備掃描頻寬0.56MHz，靈敏度5.74ppm/nm之良好性能。由於探針以TSMC 0.25μm製程製作，並設計以其中之金屬層作為蝕刻罩幕，後製程之蝕刻可靠度乃為關鍵，本研究利用感應式耦合電漿 (ICP) 乾蝕刻以及氫氧化四甲銨 (TMAH) 濕蝕刻，以其對標準CMOS製程材料之高選擇比，可實現無光罩後製程以釋放探針結構。

The probe array storage system is a promising concept for realizing ultra-high density storage. However, precise positioning is critical to the design of probe array storage system. A dual-axis piezoresistive probe is developed in this work. The probe is composed of a triangular section and a rib section with significant stiffness difference for tracking and data read/write. Polysilicon layer as 9.5kΩ piezoresistors is deposited at the intersection of the two sections and also at the cantilever end of the rib section for position tracking and data read/write, respectively. Simulations by finite element software ANSYS are conducted for parameter analysis. The dual-axis probe of 70μm in the length of the triangular section and 235μm the length of the rib section is capable of distinguishing vertical and lateral displacement efficiently. The design yields 1.16N/m in vertical stiffness and 2N/m in lateral stiffness and achieves 0.56MHz bandwidth of data scanning and 5.74ppm/nm sensitivity of voltage readout by full-Whetstone bridge while preventing from damaging the data media. Fabrication of the probe by integrating the probe and VLSI circuit under TSMC 0.25 foundry process is CMOS (complementary-metal-oxide-semiconductor) compatible. Post-CMOS by ICP (inductively coupled plasma) dry etch process and TMAH (tetramethylammonium hydroxide) wet etch process for high selectivity etching are also developed for releasing the probe structure.

Abstract……………………………………………………………………i
Table of Contents……………………………………………………ii
List of Tables…………………………………………………………………iii
List of Figures…………………………………………………………………iv
Chapter 1 Introduction…………………………………………………………1
1.1Motivation……………………………………………………………………1
1.2Literature Review……………………………………………………………2
1.3Outline………………………………………………………………………3
Chapter 2 Design of a Dual-Axis Piezoresistive Probe……………………………5
2.1 Dual-Axis Probe……………………………………………………………5
2.2 Piezoresistive Sensor…………………………………………………………6
2.3 Probe Design………………………………………………………………9
2.4 Simulation………………………………………………………………12
Chapter 3 Implementation of the Dual-Axis Piezoresistive Probe……………22
3.1 Standard CMOS Process……………………………………………………22
3.2 Floor Plan and Layouts……………………………………………………22
3.3 Poly-Silicon Piezoresistor…………………………………………………24
Chapter 4 Post-process of Dual-Axis Piezoresistive Probe System………………36
4.1 Post-CMOS Process………………………………………………………36
4.2 ICP Dry-etching Experiments.…………………………………………37
4.3 TMAH Wet-etching Experiments…………………………………………39
Chapter 5 Summary and Conclusions…………………………………………57
References………………………………………………………………58

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