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研究生:郭宏銘
論文名稱:以Alignment mark的選擇作為改善黃光製程上的OVL budget之研究
論文名稱(外文):A study of Overlay Budget Improvement by Alignment Mark Selection
指導教授:張國明
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電機學院碩士在職專班電子與光電組
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2010
畢業學年度:99
語文別:英文
論文頁數:65
中文關鍵詞:選擇
外文關鍵詞:selection
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學生在半導體製造工作有七年的經驗,工作以來全部浸淫在黃光微影製程的環境裡。半導體黃光製程的重心一直以來都在於線寬的縮小,眾多的論文研究無不在討論如何縮小線寬、提高解像力、增加景深(DOF depth of focus)。所以眾多相關的技術被開發出來,例如:OPC光罩、短波長雷射的應用、新光阻開發、泡水機(immersion)的出現。
的確在製程開發之初是線寬的縮小是個大挑戰,但是在產品到生產線上大量生產時,與本層與前層的重合對準不佳的問題佔了每天不良貨(NG lot)六、七成的比重。這也是學生在半導體工廠每天重複不斷遇到最多的問題。
本篇論文是在這樣子的出發點下寫出。希望藉由對準指標(alignment mark)與重合指標(overlay mark)的選取,來趨近實際產品的重合趨勢。以期達到增加積體電路在本層疊對前層時的對準的能力,從而減少不良產品(NG lot)的出現及重工(rework),提升有效產能及品質。
學生論文提出二個可能是增加重合餘裕的方法,希望能作為以後重合指標(overlay mark)選取或者是本層前層機台間配對(machine mix matching)的參考。

I have worked about seven years experiment in semiconductor manufacture. All jobs are related to the photolithography process. The point about semiconductor photolithography process is the shrinkage of the line pitch. Numbers of articles have been devoted to the study of how to reduce the line pitch, enhanced the resolution, increase the DOF (depth of focus). Thus numerous technology have been developed, example of those are: OPC (optical proximity correction) reticle, application of short wavelength LASER, development of new photo resist, appearance of immersion scanner. It is really a huge challenge that shrink the line pitch at the beginning of the new photolithography process develop, however, when the product release to the manufacture line for mass production, there are sixty to seventy percentages of the trouble lots is the current layer is not fine overlap to the previous layer. This is I met the most problems in the manufacture FAB repeatedly everyday.
This thesis is been written with this staring-point. I wish by the selection of the alignment marks and overlay marks to approach the products overlay trend for achieving an objective that increases the overlay ability of current layer aligns previous layer. And thereupon, diminish the NG lot and lot rework to improve the effective throughputs.
This thesis provides two methods which might actually improve the overlay margin. It is a chance to be a consult of overlay mark selection or current layer to previous layer machine mix and matching.

Chapter 0 Purpose and Motivation 1
0.1An unexpected OVL improvement 1
Chapter 1 Introduction 2
1.1The role which photolithography plays in semiconductor manufacture 2
1.2Process sequence of photolithography 2
1.3Process of photolithography
1.3.1 Primer 4
1.3.2 Resistor Coating 4
1.3.3 Soft Bake 5
1.3.4 Alignment and Exposure 5
1.3.5 PEB 7
1.3.6 Development 8
1.3.7 PDB 8
1.4About the scanner/stepper 8
1.4.1 Scanner/ stepper 9
1.4.2 Measurement check and throughput 9
1.4.3 Resolution and DOF 10
1.5Pattern Inspection 11
1.5.1 Defect check 11
1.5.2 CD (critical dimension) check 11
1.5.3 OVL (overlap) check 12
Chapter 2 Theory Descriptions 14
2.1Alignment sequence and overlay corrections 14
2.2Measurement of the alignment mark 14
2.3Measurement of the OVL mark 15
2.3.1 Calculation of the raw data 15
2.3.2 Wafer shift X, Y 15
2.3.3 Wafer magnification X, Y 16
2.3.4 Wafer rotation X, Y 16
2.3.5 Shot magnification 17
2.3.6 Shot rotation X, Y 17
2.4Overlay residuals 17
2.5Matching OVL distortion adjustment 18
2.6Reticle and Lens heating 19
Chapter 3 Data Collection and Analysis Methods 21
3.1Data Collection
3.1.1 Two layers OVL data in three months 21
3.1.2 Machine Matching Data 21
3.1.3 Process Sequence Log 22
3.2Analysis Methods 22
3.2.1 OVL Simulation tool 22
3.2.2 Data comparison 22
3.3 Two hypotheses 22
3.3.1 Relationship between EGA mark position and distortion data 22
3.3.2 Reticle heating cause shot distortion 23
Chapter 4 Analysis 24
4.1 Simulations Matching data as EGA position 24
4.2 Sequence Log data compare to OVL data 28
4.3 Reticle and projection lens heating cause shot magnification OVL data 28
4.4 The other layers verification 30
Chapter 5 Results and Conclusion 32
5.1 Results and Conclusion 32
Chapter 6 Future Work 34
6.1 Future Work 34

Reference Documents

[1] 蕭宏,半導體製程技術到論修訂版,歐亞書局有限公司,民國96年

[2] 力晶半導體,新進工程師訓練手冊,民國 94 年

[3] 施敏,半導體元件物理與製作技術,國立交通大學出版社,民國91年

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