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研究生:段鼎洲
研究生(外文):Ding-Zhou Duan
論文名稱:三維電腦繪圖之運算模組設計
論文名稱(外文):Datapath design for fast 3Dgraphic processing
指導教授:陳紹基陳紹基引用關係
指導教授(外文):Sau-Gee Chen
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:英文
論文頁數:136
中文關鍵詞:3D 電腦繪圖座標轉換Phong 著色法數學運算
外文關鍵詞:3D graphicsgeometric transformationphong shadingarithmetic algorithm
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在本論文中,我們最主要的研究是針對在3D繪圖中的一些相關硬體設計,做最佳化或創新之設計,以期能增進現今3D繪圖之效能。而所選擇的研究對象,包含下列三個部分:(1)座標轉換器:我們從基本的座標轉換分析開始,根據一些轉換矩陣特徵,發展一個較為簡單的架構,以省去不必要的乘法運算。(2)除法、開根號與乘法器之綜合硬體設計:設計一以2為底的浮點運算單元,並運用over-redundant 的表示方式,將三種運算以一相容硬體加以實踐,並符合IEEE浮點算數標準規格。(3)著色器的硬體設計:針對3D繪圖上之著色方式中品質最佳的Phong Shading 方法設計硬體,以期減少CPU運算上的負擔,並達到3D繪圖速度上的要求。

In this thesis, our goal is to design and optimize new efficient processing cores for 3D graphics. This these is divided into three parts: (I) The datapath design for geometric transformation: First we analysis basic geometric transformation operations used in 3D graphics. Based on the special features of matrix-vector multiplication for geometric transformation, we design a simple architecture that eliminates redundant multiplication. (II) A fused efficient VLSI implementation of radix 2 floating-point arithmetic unit is presented, which is capable of doing division, square root and multiplication. To make the quotient/ root digit's selection function simple, over-redundant radix 2 representation is used. The arithmetic unit complies with IEEE's binary floating-point standard. (III) The datapath design for 3D graphic shading. We introduce some shading methods that are usually used for 3D graphics. A VLSI architecture is designed for Phong shading, which has the best performance for 3D graphics shading. Our targets for this architecture are to decrease the computation of CPU and can arrive the speed's requires for 3D graphics.

Contents
Chinese Abstracti
English Abstractii
Acknowledgementiii
Contentsiv
List of Tablesvii
List of Figuresviii
Chapter 1 Introduction1
1.1 Concept of 3D Computer Graphic1
1.2 Introduction of OpenGL 2
1.3 Design Consideration of 3D Graphic Chip5
1.3.1 Datapath Design for Geometric Transformations7
1.3.2 A shared Unit for Division, Square Root and Multiplication8
1.3.3 Shading Methods in 3D Graphics9
1.4 Organization of the Thesis10
Chapter 2 Geometric Transformation11
2.1 Introduction11
2.2 Object transformations14
2.3.1 Translation14
2.3.2 Rotation15
2.3.3 Scaling16
2.3.4 Shearing17
2.3 Homogeneous coordinate and matrix representation18
2.4 Concatenation of Transformations20
2.5 Projections21
2.5.1 Orthographic projection22
2.5.2 Perspective Projections24
2.6 Manipulating the Matrix Stacks27
2.7 Implementation of Transformations in OpenGL28
Chapter 3 Datapath Design for Geometric Transformations31
3.1 Introduction31
3.2 Floating Point Definition31
3.3 Fused Floating Point Multiply-Add Unit33
3.4 FMA Used in Geometric Transformation34
3.5 Analysis of the Geometric Transformation Matrices and MAC Unit in Graphics
Pipeline35
3.6 The Modified Architecture38
3.6.1 Parallel Exponent Computation38
3.6.1.1 Zeros and Ones Detector39
3.6.1.2 Common Exponent Detector40
3.6.1.3 Finding the Negligible Exponent Sums43
3.6.1.4 Complete Architecture of Parallel Exponent Computation43
3.6.2 Mantissa MAC Input Selector44
3.6.2.1 The Shift Part45
3.6.2.2 The Non-trivial Part46
3.6.3 The Mantissa MAC49
3.6.4 The Final Mantissa Adder and Normalizer51
3.6.4.1 The Leading-zero Anticipator52
3.6.4.2 The Leading-zero Counter54
3.7 Overall Architecture and Performance57
Chapter 4 A Combined Floating Point Radix-2 Arithmetic Algorithm and Architecture61
4.1 Introduction61
4.2 The Unified Division/Square Root/ Multiplication Algorithm63
4.2.1 The Division Algorithm63
4.2.1.1 Range of the Partial Remainder63
4.2.1.2 Quotient Selection Function65
4.2.1.3 The Division Recursion67
4.2.2 The Square Root Algorithm68
4.2.2.1 Range of the Partial Remainder68
4.2.2.2 Selection Function for Square Root69
4.2.2.3 The Square Root Recursion72
4.2.3 The MSD-First Multiplication Algorithm72
4.2.3.1 The Recursive Relationship73
4.2.3.2 Generation of Product Digits74
4.3 The Modified On-the-fly Converter75
4.4 The Hardware Design Implementation78
4.4.1 Radix-2 Redundant Arithmetic78
4.4.2 Carry Free Adder78
4.4.3 Digit Selection Architecture80
4.4.4 The Modified On-the-fly Converter82
4.4.5 PRD Generation84
4.4.6 Product Digit Decoder87
4.5 The Overall Architecture88
Chapter 5 Algorithm and Hardware design for Phong Shading91
5.1 Modeling of Lighting91
5.2 Surface-Shading Methods93
5.2.1 Flat Shading94
5.2.2 Gouraud Shading94
5.3 Phong Shading97
5.3.1 The Conventional Phong Shading97
5.3.2 Fast Phong Shading by Using Taylor's Series Approximation99
5.4 The Proposed Algorithm for Phong Shading102
5.4.1 Using the Proposed Shared Architecture105
5.4.2 Newton-Raphson Method [35]106
5.4.3 CCM Algorithm107
5.4.4 Log Space Computation108
5.5 Datapath Design for Modified Phong Shading110
5.5.1 The Fn(x) and Fd(x) Evaluator111
5.5.2 The Log Stage111
5.5.3 Multiplier 1114
5.5.4 The Anti-log Stage114
5.5.5 Multiplier 2115
5.6 The Total Hardware Implementation115
Chapter 6 Conclusion118
Reference120
Appendix A124
Appendix B128
Autobiography136

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