臺灣博碩士論文加值系統

隨著近幾年積體電路製程技術的進步，我們需要更快速及更複雜的測試設備來達到測試的規格及功能。有一種簡化測試設備的創新方法，就是將測試功能搬到晶片內部，而這種方法就叫作內建自我測試。如何在有限的面積及電源消耗增加之下來達到內建自我測試的功能，是現今混合信號測試設計者最重要的一項課題。
在本論文中，我們完成了一個全差動、取樣頻率140 MHz、轉角頻率10 MHz、切換電容式四階低通濾波器用來當作待測電路；此濾波器包括了兩個串接的biquad濾波器。除此之外，我們利用三角波各部份所佔的機率這樣一個觀念來實現我們切換電容式濾波器的內建自我測試電路。我們的內建自我測試電路包括了一個29.2 KHz三角波振盪器用來當作測試波形產生器、一個雙端轉單端電路及一個雙重比較器用來作為輸出響應分析器。利用這樣一個方法，我們可以由測試結果得知每一個biquad濾波器所擁有的增益誤差及偏移誤差。

As IC fabrication technology advances in recent years, faster and more complex test equipments are required to achieve test specifications and test functions. An innovative method to simplify the test equipment is to move test functions onto the chip itself, which is called Built-In-Self-Test (BIST). How to achieve on-chip test function with limited area and power overhead is the main issue for mixed-signal testing designers.
In this thesis, we accomplish a fully-differential, 140 MHz sampling frequency, 10 MHz corner frequency, switched-capacitor 4th-order low-pass filter to be the core circuit, which consists of two cascading biquad filters. Besides, we use the concept about probabilities of a triangular-wave to implement BIST circuits for the SC filter. In our BIST circuit, it consists of a 29.2 KHz triangular oscillator taken as test-waveform-generator, a differential-to-single-ended circuit and a dual-comparator taken as output-response-analyzer. According to this approach, we can obtain the information on gain error and offset error of each biquad filters from test results.

TITLE PAGE i
ABSTRACT (CHINESE) ii
ABSTRACT (ENGLISH) iii
ACKNOWLEDGEMENT iv
CONTENTS v
LIST OF FIGURES vii
LIST OF TABLES x

CHAPTER 1 INTRODUCTION
1.1 MOTIVATION 1
1.2 THESIS ORGANIZATION 2
CHAPTER 2 BACKGROUND
2.1 INTRODUCTION OF IEEE STD.1149.4 4
2.2 RESEARCH OF SC FILTER BISTS 7
2.2.1 Multi-frequency TPG 8
2.2.2 Multi-frequency ORA 9
2.2.3 Reused-based BIST of 8th Order Filter 10
2.3 CONCEPT AND FORMULA DERIVATION 12
CHAPTER 3 SWITCHED-CAPACITOR LOW-PASS FILTER
3.1 FULLY DIFFERENTIAL, HIGH BANDWIDTH OPAMP 15
3.1.1 Fully-Differential Structure 16
3.1.2 Design considerations 18
3.1.3 Fully differential, High Bandwidth Opamp 21
3.1.4 Wide-swing Constant-transconductance Bias Circuit 26
3.2 SC LOW-PASS FILTER 31
3.2.1 Resistor Equivalence of a Switched capacitor 31
3.2.2 Signal-flow-graph Analysis of Low-pass Biquad Filter 33
3.2.3 Switches 36
3.2.4 Nonoverlapping Clocks 44
3.2.5 Simulation Results of the SC Low-pass Filter 46
CHAPTER 4 BUILT-IN-SELF-TEST CIRCUIT
4.1 TEST-WAVEFORM-GENERATOR 51
4.1.1 Triangular-wave Oscillator 52
4.1.2 CMFB 54
4.1.3 Simulation Results of TWG 55
4.2 OUTPUT-RESPONSE-ANALYZER 58
4.2.1 Dual-comparator 58
4.2.2 Differential-to-single-ended Circuit 59
4.2.3 Simulation Results of the Differential-to-single-ended Circuit 62
4.3 TOP ARCHITECTURE AND SIMULATION RESULT 64
4.4 LAYOUT CONSIDERATION AND IMPLEMENTATION 68
4.4.1 Power Lines 69
4.4.2 Capacitors 69
4.4.3 Top Layout Placement Considerations 70
CHAPTER 5 CONCLUSION AND FUTURE WORK
5.1 CONCLUSION 73
5.2 FUTURE WORK 74

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