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研究生:葉啟龍
研究生(外文):Chi-Lung Yeh
論文名稱:應用於全數位鎖相迴路之新架構數位控制振盪器
論文名稱(外文):A Novel Structure of Digitally Controlled Oscillator for All-Digital Phase-Locked Loop
指導教授:張振豪
指導教授(外文):Robert C. Chang
學位類別:碩士
校院名稱:國立中興大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2003
畢業學年度:91
語文別:中文
論文頁數:68
中文關鍵詞:全數位鎖相迴路數位控制振盪器
外文關鍵詞:All-Digital Phase-Locked LoopDigitally Controlled Oscillator
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本篇論文描述一個應用於全數位鎖相迴路之數位控制振盪器(DCO)的架構與設計,運用新架構的方式,去改善傳統架構數位控制振盪器(DCO)的缺點,使本電路具有較佳的線性度、較好的振盪波形、較小的Jitter,並可振盪出較高的頻率。本新架構之數位控制振盪器(DCO)擁有14-bit的數位控制字元,使用的是TSMC 0.35um 1P4M的製程,操作電壓3V。
模擬結果顯示,擁有14-bit的數位控制振盪器(DCO),操作在數位控制字元0 ~ 16383時,頻率範圍為860 MHz ~ 1.328 GHz,其在中心頻率1.1 GHz時Jitter為0.13 ps,最小位元解析度(LSB resolution)為22.5 fs。

This thesis describes the architecture and design of digitally controlled oscillator(DCO) for all-digital phase-locked loop(ADPLL), which uses a novel structure to improve the drawback of the traditional DCO structure. The proposed DCO design has characteristics of superior linearity, better oscillatory waveform, smaller Jitter, and higher oscillatory frequency. The novel DCO has a 14-bit digitally controlled word and is implemented by the TSMC 0.35μm 1P4M technology. The supply voltage is 3V.
The simulation results show 14-bit resolution of DCO. When DCO operates with digitally controlled words of 0 ~ 16383, the frequency range is 860 MHz ~ 1.328 GHz. The jitter is 0.13 ps at a center frequency of 1.1GHz. The least significant bit resolution(LSB resolution)is 22.5 fs.

目錄
摘要………………………………………………………………Ⅰ
Abstract…………………………………………………………Ⅱ
目錄………………………………………………………………Ⅲ
圖目錄……………………………………………………………Ⅵ
表目錄……………………………………………………………Ⅷ
第一章 緒論 …………………………………………………………1
1.1 研究動機 ……………………………………………………1
1.2 研究方法與流程 …………………………………………2
1.3 內容大綱 ….………………………………………………2
第二章 全數位鎖相迴路簡介 …………………………………………3
2.1 鎖相迴路的種類 ………………………………………………3
2.2 全數位鎖相迴路(All Digital Phase-Locked Loop) …………3
2.2.1 系統架構概說…………………………………………4
2.2.2 系統流程…………………………………………………5
2.3 Motorola之全數位鎖相迴路…………………………………5
2.3.1 Motorola之系統架構概說…………………………………6
2.3.2 Motorola之系統流程…………………………………7
2.3.2.1頻率獲取(Frequency acquisition)……………………8
2.3.2.2 相位獲取(Phase acquisition)…………………8
2.3.2.3頻率維持和相位維持…………………………………9
2.3.3 二元搜尋法………………………………………………9
第三章 數位控制振盪器(Digitally Controlled Oscillator;DCO)……12
3.1 數位控制振盪器(DCO)之簡介……………………………12
3.2 傳統數位控制振盪器一………………………………13
3.3 傳統數位控制振盪器二……………………………17
3.4 傳統數位控制振盪器三…………………………………23
3.5 傳統數位控制振盪器四………………………………… 27
第四章 新架構的數位控制振盪器(DCO)………………………… 32
4.1 新架構的數位控制振盪器(DCO)……………………………32
4.1.1 電路架構與操作原理…………………………………32
4.1.2 最小位元解析度(LSB Resolution)……………………35
4.1.3 數位控制字元對應輸出頻率曲線圖和輸出波形……36
4.2 傳統架構在數位控制字元小時的缺點……………………39
4.3 新架構改善在數位控制字元小時之缺點的原因……………42
4.4 傳統架構最大輸出訊號頻率的決定因素…………………43
4.5 新架構最大輸出訊號頻率較高的原因………………………45
4.6 傳統架構線性度不佳的原因…………………………………48
4.7 新架構改善線性度的原因……………………………………51
4.8 各家數位控制振盪器(DCO)之比較…………………………53
第五章結論……………………………………………………………….55
參考文獻………………………………………………………………….56
附錄A…………………………………………………………………59

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