臺灣博碩士論文加值系統

CMOS 影像感測器具有低必v消耗、高整合度以及低成本之優點，明顯地，CMOS 影像感測器即將成為新一代的影像擷取技術。在影像感測器中CMOS 光電二極體扮演了一個最重要的光電轉換角色，因為CMOS 光電二極體的特性參數為控制影像品質的重要關鍵，本論文之目的即為探討累增崩潰光電二極體其具有偵測單一光子的能力之特性參數。我們提出一種可承受高逆向偏壓與具有低暗電流量的光電二極體佈局設計，並推導其崩潰電壓模型。在驗証這個模型的過程上，我們利用TSMC (Taiwan Semiconductor Manufactory Company)所提供的 0.35 2P4M (Two Poly Layers and Four Metal Layers) CMOS製程，在探討崩潰電壓部份設計了數種不同接面結構、不同感光面積、不同感光週長與邊角數目的光電二極體佈局，量測的結果顯示較短週長、較大面積和較多之邊角數目的光電二極體具有較高之崩潰電壓。在暗電流部份具有較少邊角數目的光電二極體陣列其暗電流量較少。因此本論文所提出的崩潰電壓模型將可應用於高崩潰電壓、低暗電流量之CMOS光電二極體設計。

The CMOS process has increasingly becoming the mainstay in the IC market due to advantages of its low-power dissipation and high-density integration. In an image sensor system, the photodiode play the most important role of the photo-electronic conversion device. This paper will conduct a complete analysis, simulation and measurement of the sensor characteristics of the avalanche photodiode. First, with high reverse biased and low dark current, a CMOS photodiode breakdown model will be derived. Next the 2P4M CMOS 0.35 process provided by the TSMC is used to design photodiodes with different structures、area 、periphery and corner numbers. Lastly, the results from measurement and simulation are compared and analyzed. The concept of this proposed model can be utilized in CMOS photodiode design with high breakdown voltage and low dark current.

摘要 I
目錄 II
圖目錄 III
表目錄 III
第一章 緒論 1
1.1研究背景 1
1.2 研究目的 2
1.3 論文架構 2
第二章 CMOS影像感測器之介紹 3
2.1 CMOS影像感測器之結構 3
2.2 應用於赫瞍狾﹞妓祤W崩潰光電二極體 8
第三章 累增崩潰光電二極體之研究 10
3.1 累增崩潰光電二極體接面結構 10
3.1.1 接面零偏壓 13
3.1.2 接面零偏壓電場 16
3.1.3 接面零偏壓空間電荷寬度 20
3.1.4 光電二極體逆向偏壓 22
3.2像素形狀與累增崩潰光電二極體之關係 24
3.3累增崩潰光電二極體之崩潰電壓模型 32
3.4 累增崩潰光電二極體之暗電流量測數據結果與分析 36
第四章 累增崩潰光電二極體陣列量測結果分析 38
4.1 接面結構和像素形狀與累增崩潰光電二極體陣列之關係 38
4.2 累增崩潰光電二極體陣列之暗電流量測數據結果與分析 46
第五章 結論 48

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